编辑: 夸张的诗人 | 2019-01-24 |
10 30
29 28
27 26
25 24
23 22
21 39
38 37
36 35
34 33
32 31
11 12
13 14
15 16
17 18
19 20 GND PAD (BOTTOM) PGD_N DE_EN VR_EN VSEL6 VSEL5 VSEL4 VSEL3 VSEL2 PGOOD VIN VRHOT# NTC VSEL1 VSEL0 PWM1 PWM3 FCCM ISEN1 ISEN2 VSUM VO OCSET RTN VSEN VDIFF FB COMP VW VDD VSS SOFT PMON RBIAS LP DE_ENN DFB DROOP 3V3 PWM2 ISEN3 ISL9506 FN6722 Rev 0.00 Page
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28 August 13,
2008 Functional Pin Description LP (Pin 1) Low power indicator input. When asserted low, indicates a reduced load-current condition. For ISL9506, when LP is asserted low, PWM2 will be disabled. PMON (Pin 2) An analog output. PMON sends out an analog signal proportional to the product of VSEN voltage and the droop voltage. RBIAS (Pin 3) Connect a 147k Resistor to VSS, sets the internal current reference. VRHOT# (Pin 4) Thermal overload output indicator. NTC (Pin 5) Thermistor input to VRHOT# circuit. SOFT (Pin 6) A capacitor from this pin to VSS sets the maximum slew rate of the output voltage. It affects both soft start and VSEL transitioning slew rate. SOFT pin is the non-inverting input of the error amplifier. OCSET (Pin 7) Overcurrent set input. A resistor from this pin to VO sets DROOP voltage limit for OC trip. A 10?A current source is connected internally to this pin. VW (Pin 8) A resistor from this pin to COMP programs the switching frequency. (7k? gives approximately 300kHz). VW pin sources current. COMP (Pin 9) This pin is the output of the error amplifier. FB (Pin 10) This pin is the inverting input of error amplifier. VDIFF (Pin 11) This pin is the output of the differential amplifier. VSEN (Pin 12) Remote output voltage sense input. Connect to the point of load. RTN (Pin 13) Remote voltage sensing return. Connect to ground at the point of load. DROOP (Pin 14) Output of droop amplifier. Output = VO + DROOP. DFB (Pin 15) Inverting input to droop amplifier. VO (Pin 16) An input to the IC that reports the local output voltage. VSUM (Pin 17) This pin is connected to the current summation junction. VIN (Pin 18) Battery supply voltage, used for feed forward. VSS (Pin 19) Signal ground;
Connect to local controller ground. VDD (Pin 20) 5V bias power. ISEN3 (Pin 21) Individual current sensing for Channel 3. ISEN2 (Pin 22) Individual current sensing for Channel 2. ISEN1 (Pin 23) Individual current sensing for Channel 1. FCCM (Pin 24) Forced Continuous Conduction Mode (FCCM) enable pin to MOSFET drivers. It will disable diode emulation. PWM3 (Pin 25) PWM output for Channel 3. When PWM3 is pulled to 5V VDD, PWM3 will be disabled and allow other channels to operate.
1 40
2 3
4 5
6 7
8 9
10 30
29 28
27 26
25 24
23 22
21 39
38 37
36 35
34 33
32 31
11 12
13 14
15 16
17 18
19 20 GND PAD (BOTTOM) PGD_N DE_EN VR_EN VSEL6 VSEL5 VSEL4 VSEL3 VSEL2 PGOOD VIN VRHOT# NTC VSEL1 VSEL0 PWM1 PWM3 FCCM ISEN1 ISEN2 VSUM VO OCSET RTN VSEN VDIFF FB COMP VW VDD VSS SOFT PMON RBIAS LP DE_ENN DFB DROOP 3V3 PWM2 ISEN3 ISL9506 FN6722 Rev 0.00 Page
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28 August 13,
2008 PWM2 (Pin 26) PWM output for Channel 2. For ISL9506, LP low will make this output tri-state. When PWM2 is pulled to 5V VDD, PWM2 will be disabled and allow other channels to operate. PWM1 (Pin 27) PWM output for channel 1. VSEL0:6 (Pin28:Pin34) Voltage Selection input with VSEL0 = LSB and VSEL6 = MSB. VR_EN (Pin 35) Voltage Regulator Enable input. A high level logic signal on this pin enables the regulator. DE_EN (Pin 36) Diode Emulation Enable signal. A high level logic signal on this pin will allow diode emulation operation. Only if the current is low enough, the diode emulation will actually be entered. DE_EN logic high also affects the output voltage transition from one voltage selection to anther programmed by voltage select. DE_ENN (Pin 37) DE_EN and DE_ENN work together for diode emulation. Generally a reversed logic signal of DE_EN should be applied to DE_ENN. PGD_N (Pin 38) Digital output prior to PGOOD high. Goes nominal (logic 0) after