编辑: ok2015 2019-09-07
概述 DS1308串行实时时钟(RTC)是一款低功耗、二-十进制编 码(BCD)的时钟/日历,外加56字节NV RAM.

地址与数据 通过I?C接口串行传输.时钟/日历提供秒、分、时、星期、 日、月和年信息.对于少于31天的月份,将自动调整月 末日期,包括闰年修正.时钟格式可以是24小时或带AM/ PM指示的12小时格式.DS1308内置电源检测电路,检测 主电源失效时自动切换到备用电源,以保持时间、日期信 息和计时. 应用 手持装置(GPS、POS终端) 消费类电子(机顶盒、数字记录仪、网络应用) 办公设备(传真机/打印机、复印机) 医疗(血糖仪、给药器) 电信(路由器、交换机、服务器) 其它(电表、售货机、温度监控器、调制解调器) 特性 S 250nA (典型值)超低计时电流 S 可配合ESR高达100k?的晶振工作 S RTC提供秒、分钟、小时、日、月、星期及年计时,带 闰年补偿,有效期至2400年S 56字节、电池备份、通用RAM,写次数不受限制 S I2C串口 S 外部时钟源, 用于参考时钟同步(例如32kHz、 50Hz/60Hz 电力线、GPS 1PPS) S 可编程方波输出信号 S 自动电源失效检测和切换电路 S -40°C至+85°C工作温度范围 S 通过美国安全试验协会(UL)认证 典型工作电路 19-6353;

Rev 0;

5/12 定购信息在数据资料的最后给出. 本文是英文数据资料的译文,文中可能存在翻译上的不准确或错误.如需进一步确认,请在您的设计中参考英文资料. 有关价格、供货及订购信息,请联络Maxim亚洲销售中心:10800

852 1249 (北中国区),10800

152 1249 (南中国区), 或访问Maxim的中文网站:china.maximintegrated.com. 相关型号以及配合该器件使用的推荐产品,请参见:china.maximintegrated.com/DS1308.related. DS1308 SCL SDA SQW/CLKIN X1 X2 VBAT GND VCC VCC RPU RPU RPU CPU VCC ??2 (All voltages relative to ground.) Voltage Range on VCC or VBAT.0.3V to +6.0V Voltage on Any Non-Power Pin.0.3V to (VCC + 0.3V) Operating Temperature Range.40NC to +85NC Junction Temperature Maximum.150NC Storage Temperature Range.55NC to +125NC Lead Temperature (soldering, 10s)300NC Soldering Temperature (reflow)260NC Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional opera- tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Recommended Operating Conditions (TA = -40NC to +85NC, unless otherwise noted.) (Note 2) DC Electrical Characteristics (VCC = VCCMIN to VCCMAX, VBAT = VBATMIN to VBATMAX, TA = -40NC to +85NC, unless otherwise noted.) (Note 2) FSOP Junction-to-Ambient Thermal Resistance (BJA)......206.3NC/W Junction-to-Case Thermal Resistance (BJC)42NC/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four- layer board. For detailed information on package thermal considerations, refer to china.maximintegrated.com/thermal-tutorial. Package Thermal Characteristics (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Operating Voltage Range VCC DS1308-18 1.71 1.8 5.5 V DS1308-3 2.7 3.0 5.5 DS1308-33 3.0 3.3 5.5 Battery Voltage VBAT 1.3 5.5 V Logic

1 Input VIH 0.7 x VCC VCC + 0.3 V Logic

0 Input VIL -0.3 0.3 x VCC V PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Power-Supply Active Current (Note 3) ICCA -3 or -33: fSCL = 400kHz

325 FA Power-Supply Standby Current (Note 4) ICCS -33: VCC = 3.63V

125 FA VCC = VCCMAX

200 Battery Leakage Current IBATLKG VCC R VPF -100

25 +100 nA Input Leakage (SCL) II VIN = 0V to VCC -0.1 +0.1 FA I/O Leakage (SDA, SQW/CLKIN) IIO I2C bus inactive, ECLK =

1 -0.1 +0.1 FA Output Logic

0 (SDA, SQW/ CLKIN), VOL = 0.4V IOL VCC R VCCMIN 3.0 mA VBAT R 1.3V R VCC + 0.2V

250 FA Power-Fail Trip Point VPF -33 2.70 2.82 3.00 V Switchover Voltage VSW VBAT >

VPF VPF V VBAT <

VPF VBAT >

VCC ??3 DC Electrical Characteristics (VCC = 0V, VBAT = VBATMIN to VBATMAX, TA = -40NC to +85NC, unless otherwise noted.) (Note 2) AC Electrical Characteristics (VCC = VCCMIN to VCCMAX, TA = -40NC to +85NC, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Battery Current, SQW Off (Note 5) IBAT1 VBAT = 3V

250 nA VBAT = VBATMAX

600 Battery Current, SQW On (Note 6) IBAT2 VBAT = 3V

550 nA VBAT = VBATMAX

1100 Data-Retention Current (Note 7) IBATDAT VBAT = 3V

25 100 nA PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SCL Clock Frequency fSCL (Note 8) 0.03

400 kHz Bus Free Time Between a STOP and START Condition tBUF 1.3 Fs Hold Time (Repeated) START Condition tHD:STA (Note 9) 0.6 Fs Low Period of SCL Clock tLOW 1.3 Fs High Period of SCL Clock tHIGH 0.6 Fs Data Hold Time tHD:DAT (Notes 10, 11)

0 0.9 Fs Data Setup Time tSU:DAT (Note 12)

100 ns Setup Time for a Repeated START Condition tSU:STA 0.6 Fs Rise Time of Both SDA and SCL Signals tR (Note 13)

20 + 0.1CB

300 ns Fall Time of Both SDA and SCL Signals tF (Note 13)

20 + 0.1CB

300 ns Setup Time for STOP Condition tSU:STO 0.6 Fs Capacitive Load for each Bus Line CB (Note 13)

400 pF SCL Spike Suppression tSP

60 ns Oscillator Stop Flag (OSF) Delay tOSF (Note 14)

100 ms Timeout Interval tTIMEOUT (Note 15)

25 35 ms ??4 Power-Up/Down Characteristics (TA = -40NC to +85NC, unless otherwise noted.) (Notes 2, 16) Capacitance (TA = +25NC, unless otherwise noted.) (Note 16) Warning: Negative undershoots below -0.3V while the part is in battery-backed mode may cause loss of data. Note 2: Limits are 100% production tested at TA = +25NC and TA = +85NC. Limits over the operating temperature range and relevant supply voltage are guaranteed by design and characterization. Typical values are not guaranteed. Note 3: SCL clocking at max frequency. VSCL = 0V to VCC. Note 4: Specified with I2C bus inactive. Timekeeping and square-wave functions operational. Note 5: CH = ECLK = SQWE = 0. Note 6: CH = ECLK = 0, SQWE = RS1 = RS0 = 1, IOUT = 0mA. Note 7: CH = 1. ECLK = SQWE = 0. Note 8: The minimum SCL clock frequency is limited by the bus timeout feature, which resets the serial bus interface if SCL is held low for tTIMEOUT. Note 9: After this period, the first clock pulse is generated. Note 10: A device must internally provide a hold time of at least 300ns for the SDA signal (referenced to the VIHMIN of the SCL signal) to bridge the undefined region of the falling edge of SCL. Note 11: The maximum tHD:DAT has only to be met if the device does not stretch the low period (tLOW) of the SCL signal. Note 12: A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT R to 250ns must then be met. This is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the low period of the SCL signal, it must output the next data bit to the SDA line tRMAX + tSU:DAT =

1000 +

250 = 1250ns before the SCL line is released. Note 13: CB is the total capacitance of one bus line, including all connected devices, in pF. Note 14: The parameter tOSF is the period of time the oscillator must be stopped for the OSF flag to be set over the voltage range of 2.4V P VCC P VCCMAX. Note 15: The DS1308 can detect any single SCL clock held low longer than tTIMEOUTMIN. The device'

s I2C interface is in reset state and can receive a new START condition when SCL is held low for at least tTIMEOUTMAX. Once the part detects this condition the SDA output is released. The oscillator must be running for this function to work. Note 16: Guaranteed by design and not 100% production tested. PARAMETER SYMBOL MIN TYP........

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