编辑: 匕趟臃39 | 2017-08-25 |
200 To: 161.5.4 ? Changed slope compensation amplitude, VSLOPE, values From:
80 To:
83 (Minimum), From:
105 To:
110 (Typical), and From:
130 To:
137 (Maximum)5 Changes from Revision F (March 2013) to Revision G Page ? Changed timing resistor equation. Incorrect change when converting to TI format.12 Changes from Revision E (March 2013) to Revision F Page ? 已更改 将美国国家半导体数据表的布局更改为 TI 格式
1 3 LM5022 www.ti.com.cn ZHCSHC6I CJANUARY 2007CREVISED DECEMBER
2017 Copyright ? 2007C2017, Texas Instruments Incorporated
5 Pin Configuration and Functions DGS Package 10-Pin VSSOP Top View Pin Functions PIN I/O DESCRIPTION NO. NAME
1 VIN I Source input voltage: Input to the startup regulator. Operates from
6 V to
60 V.
2 FB I Feedback pin: Inverting input to the internal voltage error amplifier. The noninverting input of the error amplifier connects to a 1.25-V reference.
3 COMP I/O Error amplifier output and PWM comparator input: The control loop compensation components connect between this pin and the FB pin.
4 VCC O Output of the internal, high-voltage linear regulator: This pin must be bypassed to the GND pin with a ceramic capacitor.
5 OUT O Output of MOSFET gate driver: Connect this pin to the gate of the external MOSFET. The gate driver has a 1-A peak current capability.
6 GND ― System ground
7 UVLO I Input undervoltage lockout: Set the start-up and shutdown levels by connecting this pin to the input voltage through a resistor divider. A 20-?A current source provides hysteresis.
8 CS I Current sense input: Input for the switch current used for current mode control and for current limiting.
9 RT/SYNC I Oscillator frequency adjust pin and synchronization input: An external resistor connected from this pin to GND sets the oscillator frequency. This pin can also accept an AC-coupled input for synchronization from an external clock.
10 SS I Soft-start pin: An external capacitor placed from this pin to ground is charged by a 10-?A current source, creating a ramp voltage to control the regulator start-up.
4 LM5022 ZHCSHC6I CJANUARY 2007CREVISED DECEMBER
2017 www.ti.com.cn Copyright ? 2007C2017, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and specifications. (3) High junction temperatures degrade operating lifetimes. Operating lifetime is derated for junction temperatures greater than 125°C.
6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1)(2) MIN MAX UNIT VIN to GND C0.3
65 V VCC to GND C0.3
16 V RT/SYNC to GND C0.3 5.5 V OUT to GND C1.5 for <
100 ns V All other pins to GND C0.3
7 V Power dissipation Internally limited Junction temperature, TJ (3)
150 °C Storage temperature, Tstg C65
150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) The human-body model is a 100-pF capacitor discharged through a 1.5-k? resistor into each pin. (3) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(2) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(3) ±750 (1) Device thermal limitations may limit usable range 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Supply voltage