PDF《Testing quantum fault tolerance on》

s performance under inherent control and measurement errors. Subsequently in Sec. V, we present experimental results for system (3). This section also arXiv:1805.05227v2 [quant-ph]

28 Nov

2018 2 contains a comparison with systems (1) and (2), showing that IBM'

s transmon qubits are not dominantly a?ected by decoherence errors and can thus bene?t from the fault- tolerant protocol. Finally, conclusions from our study of all three systems are given in Sec. VI. II. FAULT TOLERANCE In the framework of quantum fault tolerance, logical qubits are encoded in multiple physical qubits to allow for the detection and correction of errors. This concept inevitably relies on a mathematical model for the errors that are supposed to happen in a physical quantum pro- cessor. Simple versions of these models are based on discrete, uncorrelated single-qubit errors or the possibil- ity to describe the errors within the quantum operations formalism [29], while more sophisticated studies consider non-Markovian errors in a general Hamiltonian frame- work [30C34]. The results of these studies are so-called threshold theorems, stating that as long as a certain pa- rameter in the model is below a certain threshold, arbi- trarily long quantum computation is possible. However, as these threshold theorems are only valid within the mathematical model for the errors, it is unclear whether a particular quantum error-correcting scheme is bene?cial in an actual application. For in- stance, the thresholds are usually expressed in terms of the diamond norm [35], which is experimentally inacces- sible. Although progress has been made to relate this quantity to the average gate ?delity [36, 37], recent stud- ies have demonstrated that this ?delity, too, cannot be measured in a physical quantum information processor [38]. In fact, it was shown in two independent studies that none of these error metrics can reliably predict the performance of quantum gates in a practical application [5, 28]. The fault-tolerant scheme that we test in this study was explicitly designed to apply to small quantum com- puters [15]. It replaces a bare two-qubit circuit with an encoded four-qubit circuit and an additional ancilla qubit. In this paper, the term circuit is de?ned to in- clude both an initial-state preparation and a sequence of gates. In particular, we consider the initial states |00 , |0+ = |00 +|01 , and |Φ+ = |00 +|11 (up to nor- malization). In the encoded circuits, these states are rep- resented by entangled four-qubit states (see Appendix A for their de?nitions and preparation circuits). Along with the encoding of states, there is a set of encoded gates to build a quantum circuit. In the present case, this set is given by {X1, X2, Z1, Z2, HHS, CZ}, where X1 and X2 denote bit-?ip gates, Z1 and Z2 denote sign-?ip gates, HHS denotes the Hadamard gate on each qubit followed by swapping the qubits, and CZ denotes the controlled- phase gate [29]. A full speci?cation of how all bare and encoded circuits are implemented in the fault-tolerant scheme is given in Table III and Table IV in Appendix A. The aim is to compare the performance of a bare circuit TABLE I. List of the selected

15 circuits to illustrate the di?erence between bare and encoded versions (see Appendix B for a list of all

465 tested circuits). The ?rst column contains sets of three circuit IDs labeling the circuits in the second column, which consist of particular sets of gates operating on three initial states |i ∈ |00 , |0+ , |Φ+ , enumerated in this order. ID Circuit 0-2 |i 240-242 X1 X1 X1 X1 X1 |i 216-218 CZ CZ CZ CZ CZ |i 171-173 CZ X1 X2 Z1 Z1 X1 X1 Z1 Z1 Z2 |i 270-272 HHS CZ HHS CZ HHS CZ HHS CZ HHS CZ |i with that of an encoded circuit for a representative set of circuits. To ?nd such a set, we applied the procedure suggested in [15] for the maximum circuit length T = 10, the repetition parameter RP = 6, and the periodicity P = 3, yielding