PDF《MAX31865 RTD至数字输出转换器》

MAX31865 RTD至数字输出转换器 概述 MAX31865是简单易用的热敏电阻至数字输出转换器,优 化用于铂电阻温度传感器(RTD).

外部电阻设置所用RTD的 灵敏度,高精度Σ-Δ?ADC将RTD电阻与参考阻值之比转换 成数字输出.MAX31865输入具有高达±45V的过压保护, 提供可配置的RTD及电缆开路/短路条件检测. 应用 工业设备 医疗设备 仪表 特点和优点 ? 集成更低系统功耗,简化设计,减少设计周期 ? 简便的RTD铂电阻之数字转换器 ? 支持100Ω至1kΩ (0°C时)铂电阻RTD (PT100至PT1000) ? 兼容于2线、3线和4线传感器连接 ? SPI兼容接口 ? 20引脚TQFN和SSOP封装 ? 高精度设备满足误差预算 ? 15位ADC分辨率;

标称温度分辨率为0.03125°C (随RTD非线性变化) ? 整个工作条件下,总精度保持在0.5°C (0.05%满量程) ? 全差分VREF输入 ? 转换时间:21ms (最大值) ? 集成故障检测,增加系统稳定性 ? ±45V输入保护 ? 故障检测(RTD开路、RTD短路到量程范围以外的电 压或 RTD元件短路) ? SPI兼容接口 典型应用电路 典型应用电路还会在数据资料的最后给出. 定购信息在数据资料的最后给出. 19-6478;

Rev 3;

7/15 备有评估板MAX31865 BIAS REFIN+ DVDD V DD GND1 GND2 DGND REFIN- DRDY ISENSOR SDI SCLK HOST INTERFACE CS SDO N.C. FORCE- RREF RTD RCABLE RCABLE 0.1?F VDD FORCE+ FORCE2 RTDIN+ RTDIN- CI* RCABLE RCABLE 0.1?F VDD 4-WIRE SENSOR CONNECTION *CI = 10nF FOR 1k? RTD 100nF FOR 100? RTD 本文是英文数据资料的译文,文中可能存在翻译上的不准确或错误.如需进一步确认,请在您的设计中参考英文资料. 有关价格、供货及订购信息,请联络Maxim亚洲销售中心:10800

852 1249 (北中国区),10800

152 1249 (南中国区), 或访问Maxim的中文网站:www.maximintegrated.com/cn. MAX31865 RTD至数字输出转换器 ??

2 www.maximintegrated.com/cn Voltage Range on VDD Relative to GND1.0.3V to +4.0V Voltage Range on BIAS, REFIN+, REFIN-, ISENSOR.0.3V to (VDD + 0.3V) Voltage Range on FORCE+, FORCE2, FORCE-, RTDIN+, RTDIN- Relative to GND1 ....-50V to +50V Voltage Range on DVDD Relative to DGND.0.3V to +4.0V Voltage Range on All Digital Pins Relative to DGND 0.3V to (VDVDD + 0.3V) Continuous Power Dissipation (TA = +70NC) TQFN (derate 34.5mW/NC above +70NC)2758.6mW SSOP (derate 11.9mW/°C above +70° C)952.4mW ESD Protection (all pins, Human Body Model)2kV Operating Temperature Range.40NC to +125NC Junction Temperature 150NC Storage Temperature Range.65NC to +150NC Soldering Temperature (reflow)260NC Lead Temperature (soldering,10s)300NC TQFN Junction-to-Ambient Thermal Resistance (qJA)29°C/W Junction-to-Case Thermal Resistance (qJC)2°C/W SSOP Junction-to-Ambient Thermal Resistance (qJA)84°C/W Junction-to-Case Thermal Resistance (qJC)32°C/W Absolute Maximum Ratings Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional opera- tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Thermal Characteristics (Note 1) Recommended DC Operating Conditions (TA = -40NC to +125NC, unless otherwise noted.) (Notes

2 and 3) Electrical Characteristics (3.0V P VDD P 3.6V, TA = -40NC to +125NC, unless otherwise noted. Typical values are TA= +25NC, VDD = VDVDD = 3.3V.) (Notes

2 and 3) MAX31865 RTD-to-Digital Converter www.maximintegrated.com Maxim Integrated

2 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VDD VDD 3.0 3.3 3.6 V DVDD VDVDD 3.0 3.3 3.6 V Input Logic

0 VIL CS, SDI, SCLK -0.3 0.3 x VDVDD V Input Logic

1 VIH CS, SDI, SCLK 0.7 x VDVDD VDVDD + 0.3 V Analog Voltages (FORCE+,FORCE2, FORCE-, RTDIN+, RTDIN-) Normal conversion results

0 VBIAS V Reference Resistor RREF

350 10k I Cable Resistance RCABLE Per lead

0 50 I PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ADC Resolution No missing codes

15 Bits ADC Full-Scale Input Voltage (RTDIN+ - RTDIN-) REFIN+ - REFIN- V MAX31865 RTD至数字输出转换器 ??

3 www.maximintegrated.com/cn Electrical Characteristics (continued) (3.0V P VDD P 3.6V, TA = -40NC to +125NC, unless otherwise noted. Typical values are TA= +25NC, VDD = VDVDD = 3.3V.) (Notes

2 and 3) MAX31865 RTD-to-Digital Converter www.maximintegrated.com Maxim Integrated

3 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ADC Common-Mode Input Range

0 VBIAS V Input Leakage Current RTDIN+, RTDIN-, 0NC to +70NC, on-state

2 nA RTDIN+, RTDIN-, -40NC to +85NC, on-state

5 RTDIN+, RTDIN-, -40NC to 100NC, on-state

14 Bias Voltage VBIAS 1.95 2.00 2.06 V Bias Voltage Output Current IOUT 0.2 5.75 mA Bias Voltage Load Regulation IOUT P 5.75mA

30 mV/mA Bias Voltage Startup Time (Note 4)

10 ms ADC Full-Scale Error ±1 LSB ADC Integral Nonlinearity Differential Input, endpoint fit, 0.3 x VBIAS P VREF P VBIAS ±1 LSB ADC Offset Error -3 +3 LSB Noise (over Nyquist Bandwidth) Input referred

150 FV RMS Common-Mode Rejection

90 dB 50/60Hz Noise Rejection Fundamental and harmonics

82 dB Temperature Conversion Time (Note 5) tCONV Continuous conversion (60Hz notch) 16.7 17.6 ms Single conversion (60Hz notch)

52 55 Single conversion (50Hz notch) 62.5

66 Continuous conversion (50Hz notch)

20 21 Automatic Fault Detection Cycle Time From CS high to cycle complete

550 600 Fs Power-Supply Rejection

1 LSB/V Power-Supply Current (Note 6) IDD Shutdown Bias off, ADC off 1.5

3 mA IDD Bias on, active conversion

2 3.5 mA Power-On Reset Voltage Threshold

2 2.27 V Power-On Reset Voltage Hysteresis

120 mV Input Capacitance CIN Logic inputs

6 pF Input Leakage Current IL Logic inputs -1 +1 FA Output High Voltage VOH IOUT = -1.6mA VDVDD - 0.4 V Output Low Voltage VOL IOUT = 1.6mA 0.4 V MAX31865 RTD至数字输出转换器 ??

4 www.maximintegrated.com/cn Note 2: All voltages are referenced to ground when common. Currents entering the IC are specified positive. Note 3: Limits are 100% production tested at TA= +25°C and/or TA= +85°C. Limits over the operating temperature range and rel- evant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed. Note 4: For 15-bit settling, a wait of at least 10.5 time constants of the input RC network is required. Max startup time is calculated with a 10kω reference resistor and a 0.1?F capacitor across the RTD inputs. Note 5: The first conversion after enabling continuous conversion mode takes a time equal to the single conversion time for the respective notch frequency. Note 6: Specified with no load on the bias pin as the sum of analog and digital currents. No active communication. If the RTD input voltage is greater than the input reference voltage, then an additional 400?A IDD can be expected. Note 7: All timing specifications are guaranteed by design. Note 8: Measured at VIH = 0.7V x VDVDD or VIL = 0.3 x VDVDD and 10ms maximum rise and fall times. Note 9: Measured with 50pF load. Note 10: Measured at VOH = 0.7 x VDVDD or VOL = 0.3 x VDVDD. Measured from the 50% point of SCLK to the VOH minimum of SDO. AC Electrical Characteristics: SPI Interface (3.0V P VDD P 3.6V, TA = -40NC to +125NC, unless otherwise noted. Typical values are TA= +25NC, VDD = VDVDD = 3.3V.) (Notes

3 and 7) (Figure

1 and Figure 2) MAX31865 RTD-to-Digital Converter www.maximintegrated.com Maxim Integrated

4 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Data to SCLK Setup tDC (Notes 8, 9)

35 ns SCLK to Data Hold tCDH (Notes 8, 9)

35 ns SCLK to Data Valid tCDD (Notes 8, 9, 10)

80 ns SCLK Low Time tCL (Note 9)

100 ns SCLK High Time tCH (Note 9)

100 ns SCLK Frequency tCLK (Note 9) DC 5.0 MHz SCLK Rise and Fall tR, tF (Note 9)

200 ns CS to SCLK Setup tCC (Note 9)

400 ns SCLK to CS Hold tCCH (Note 9)

100 ns CS Inactive Time tCWH (Note 9)

400 ns CS to Output High-Z tCDZ (Notes 8, 9)

40 ns Address 01h or 02h Decoded to DRDY High tDRDYH After RTD register read access (Note 9)

50 ns MAX31865 RTD至数字输出转换器 ??

5 www.maximintegrated.com/cn Figure 1. Timing Diagram: SPI Read Data Transfer Figure 2. Timing Diagram: SPI Write Data Transfer MAX31865 RTD-to-Digital Converter www.maximintegrated.com Maxim Integrated

5 CS SCLK SDI SDO tCC tCDH A7 A6 A0 D7 D6 D1 D0 tDC tCDD tCDD tCDZ NOTE: SCLK CAN BE EITHER POLARITY, TIMING SHOWN FOR CPOL = 1. WRITE ADDRESS BYTE READ DATA BYTE SCLK SDI NOTE: SCLK CAN BE EITHER POLARITY, TIMING SHOWN FOR CPOL = 1. WRITE ADDRESS BYTE WRITE DATA BYTE tCC tCDH tCH tR tF tCCH tCWH tCDH A7 A6 A0 D7 D0 tDC tCL CS 图1. 时序图:SPI读数据传输 图2. 时序图:SPI写数据传输 ??

6 www.maximintegrated.com/cn 典型工作特性 Typical Operating Characteristics (VDD = VDVDD = 3.3V, TA = +25°C, unless otherwise noted.) MAX31865 RTD-to-Digital Converter Maxim Integrated

6 www.maximintegrated.com ADC CONVERSION ERROR vs. RTD RESISTANCE (400? RREF, 4-WIRE CONNECTION) MAX31865 toc06 RRTD (?) ERROR ( ? )

300 250

200 150

100 50 -0.244

0 0.244 ? ±0.1°C ERROR 0.488 -0.488

0 350 +25°C -40°C +100°C ADC CONVERSION ERROR vs. RTD RESISTANCE (4k? RREF, 4-WIRE CONNECTION) MAX31865 toc05 RRTD (?) ERROR ( ? )

3000 2500

2000 1500

1000 500 -0.244

0 0.244 ? ±0.1°C ERROR 0.488 -0.488

0 3500 +25°C -40°C +100°C SINC FILTER OPERATION INPUT FREQUENCY vs. NOISE RESPONSE MAX31865 toc04 INPUT NOISE FREQUENCY (Hz) NOISE RESPONSE (dB)

130 90

50 -80 -60 -40 -20

0 20 -100

10 170 60Hz 50Hz LEAKAGE CURRENT PER PIN vs. TEMPERATURE (1 VOLT APPLIED TO FORCE+, FORCE2, RTDIN+, RTDIN- PINS) MAX31865 toc03 TEMPERATURE (°C) CURRENT (nA)

125 100

75 20

40 60

80 100

120 140

0 50

150 SUPPLY CURRENT vs. TEMPERATURE (ADC NORMALLY OFF MODE) MAX31865 toc02 TEMPERATURE (°C) I DD (mA)

100 50

0 1

2 3

4 0 -50

150 ANALOG IDD (BIAS PIN UNLOADED) DIGITAL IDD SUPPLY CURRENT vs. TEMPERATURE (ADC AUTO CONVERSION MODE) MAX31865 toc01 TEMPERATURE (°C) I DD (mA)

100 50

0 1

2 3

4 0 -50

150 ANALOG IDD (BIAS PIN UNLOADED) DIGITAL IDD MAX31865 RTD至数字输出转换器 ??

7 www.maximintegrated.com/cn 引脚配置 Pin Configurations MAX31865 RTD-to-Digital Converter www.maximintegrated.com Maxim Integrated

7 MAX31865 TQFN (5mm x 5mm) TOP VIEW

19 20 EP +

18 17

7 6

8 REFIN+ ISENSOR FORCE+

9 BIAS SDO SCLK SDI DGND

1 2 DRDY

4 5

15 14

12 11 DVDD VDD FORCE- RTDIN- RTDIN+ FORCE2 REFIN- CS

3 13 N.C.

16 10 GND2 GND1

20 19

18 17

16 15

13 1

2 3

4 5

6 8 N.C. GND DGND SDO BIAS VDD DVDD DRDY TOP VIEW MAX31865 CS SCLK GND2 FORCE+ REFIN-

14 7 SDI ISENSOR

11 10 RTDIN- RTDIN+

12 9 FORCE- FORCE2 REFIN+ SSOP + MAX31865 RTD至数字输出转换器 ??

8 www.maximintegrated.com/cn 引脚说明 引脚 名称 功能 TQFN SSOP

1 4 BIAS 偏置电压输出(VBIAS).

2 5 REFIN+ 基准电压输入正端,连接至BIAS.在REFIN+和REFIN-之间连接参考电阻.

3 6 REFIN- 基准电压输入负端,在REFIN+和REFIN-之间连接参考电阻.

4 7 ISENSOR RREF的低边,连接至REFIN-.

5 8 FORCE+ 高边RTD驱动,使用3线连接配置时,将其连接到FORCE2.具有±45V过压保护.

6 9 FORCE2 输入正端,仅限3线配置.3线连接配置下将其连接至FORCE+;

2线或4线连接配置下,该引脚接地.具有 ±45V过压保护.

7 10 RTDIN+ RTD输入正端,具有±45V过压保护.

8 11 RTDIN- RTD输入负端,具有±45V过压保护.

9 12 FORCE- 低边RTD回路,具有±45V过压保护.

10 13 GND2 模拟地,连接至GND1.

11 14 SDI 串行数据输入.

12 15 SCLK 串行数据时钟输入.

13 16 CS 低电平有效片选,CS置为........