PDF《8-bit》

11 0x3C Reserved 0x3B GIMSK C INT0 PCIE page

47 0x3A GIFR C INTF0 PCIF page

48 0x39 TIMSK0 C C C C OCIE0B OCIE0A TOIE0 C page

75 0x38 TIFR0 C C C C OCF0B OCF0A TOV0 C page

76 0x37 SPMCSR C C C CTPB RFLB PGWRT PGERS SELFPR- page

98 0x36 OCR0A Timer/Counter C Output Compare Register A page

75 0x35 MCUCR C PUD SE SM1 SM0 C ISC01 ISC00 pages 33, 47,

57 0x34 MCUSR C C C C WDRF BORF EXTRF PORF page

42 0x33 TCCR0B FOC0A FOC0B C C WGM02 CS02 CS01 CS00 page

73 0x32 TCNT0 Timer/Counter (8-bit) page

74 0x31 OSCCAL Oscillator Calibration Register page

27 0x30 BODCR BODS BODSE page

33 0x2F TCCR0A COM0A1 COM0A0 COM0B1 COM0B0 C C WGM01 WGM00 page

70 0x2E DWDR DWDR[7:0] page

97 0x2D Reserved C 0x2C Reserved C 0x2B Reserved C 0x2A Reserved C 0x29 OCR0B Timer/Counter C Output Compare Register B page

75 0x28 GTCCR TSM PSR10 page

78 0x27 Reserved C 0x26 CLKPR CLKPCE C C C CLKPS3 CLKPS2 CLKPS1 CLKPS0 page

28 0x25 PRR PRTIM0 PRADC page

34 0x24 Reserved C 0x23 Reserved C 0x22 Reserved C 0x21 WDTCR WDTIF WDTIE WDP3 WDCE WDE WDP2 WDP1 WDP0 page

42 0x20 Reserved C 0x1F Reserved C 0x1E EEARL C C EEPROM Address Register page

20 0x1D EEDR EEPROM Data Register page

20 0x1C EECR C C EEPM1 EEPM0 EERIE EEMPE EEPE EERE page

21 0x1B Reserved C 0x1A Reserved C 0x19 Reserved C 0x18 PORTB C C PORTB5 PORTB4 PORTB3 PORTB2 PORTB1 PORTB0 page

57 0x17 DDRB C C DDB5 DDB4 DDB3 DDB2 DDB1 DDB0 page

57 0x16 PINB C C PINB5 PINB4 PINB3 PINB2 PINB1 PINB0 page

58 0x15 PCMSK C C PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 page

48 0x14 DIDR0 C C ADC0D ADC2D ADC3D ADC1D AIN1D AIN0D pages 81,

95 0x13 Reserved C 0x12 Reserved C 0x11 Reserved C 0x10 Reserved C 0x0F Reserved C 0x0E Reserved C 0x0D Reserved C 0x0C Reserved C 0x0B Reserved C 0x0A Reserved C 0x09 Reserved C 0x08 ACSR ACD ACBG ACO ACI ACIE C ACIS1 ACIS0 page

80 0x07 ADMUX C REFS0 ADLAR C C C MUX1 MUX0 page

92 0x06 ADCSRA ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 page

93 0x05 ADCH ADC Data Register High Byte page

94 0x04 ADCL ADC Data Register Low Byte page

94 0x03 ADCSRB C ACME C C C ADTS2 ADTS1 ADTS0 pages 80,

95 0x02 Reserved C 0x01 Reserved C 0x00 Reserved C

8 8126FSCAVRC05/12 ATtiny13A Notes: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. 2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single bits can be checked by using the SBIS and SBIC instructions.ome of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI instructions will only operation the specified bit, and can therefore be used on registers containing such Status Flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.

9 8126FSCAVRC05/12 ATtiny13A 5. Instruction Set Summary Mnemonics Operands Description Operation Flags #Clocks ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers Rd ← Rd + Rr Z,C,N,V,H

1 ADC Rd, Rr Add with Carry two Registers Rd ← Rd + Rr + C Z,C,N,V,H

1 ADI........