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ti.com SNOSAU8I CMARCH 2007CREVISED MARCH
2013 LMH7322 Dual
700 ps High Speed Comparator with RSPECL Outputs Check for Samples: LMH7322 1FEATURES DESCRIPTION The LMH7322 is a dual comparator with
700 ps 2? (VCCI = +5V, VCCO = +5V) propagation delay, low dispersion of
75 ps and an ? Propagation Delay
700 ps input voltage range that extends from VCC-1.5V to ? Overdrive Dispersion
20 mV-1V
75 ps VEE. The devices can be operated from a wide supply voltage range of 2.7V to 12V. The adjustable ? Fast Rise and Fall Times
160 ps hysteresis adds flexibility and prevents oscillations. ? Wide Supply Range 2.7V to 12V Both the outputs and latch inputs of the LMH7322 are ? Input Common Mode Range Extends
200 mV RSPECL compatible. When used in combination with Below Negative Rail a VCCO supply voltage of 2.5V the outputs have LVDS compatible levels. ? Adjustable Hysteresis ? (RS)PECL Outputs (see Application The LMH7322 is available in a 24-pin WQFN package. Information) ? (RS)PECL Latch Inputs (see Application Information) APPLICATIONS ? Digital Receivers ? High-Speed Signal Restoration ? Zero-Crossing Detectors ? High-Speed Sampling ? Window Comparators ? High-Speed Signal Triggering Typical Application Figure 1. (RS)ECL to RSPECL Converter
1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright ? 2007C2013, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. LMH7322 SNOSAU8I CMARCH 2007CREVISED MARCH
2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1)(2) ESD Tolerance (3) Human Body Model 2.5 kV Machine Model 250V Output Short Circuit Duration See (4)(5)(6) Supply Voltages (VCCxCVEE) 13.2V Differential Voltage at Input Pins ±13V Voltage at Input Pins VEE-0.2V to VCCI + 0.2V Voltage at LE Pins VEE-0.2V to VCCO+0.2V Current at Output Pins 25mA Soldering Information: See Product Folder at www.ti.com and SNOA549 Storage Temperature Range ?65°C to +150°C Junction Temperature (7) +150°C (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. (2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. (3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC). Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). (4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. (5) Short circuit test is a momentary test. See next note. (6) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) C TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board. (7) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material. Operating Conditions (1) Supply Voltage (VCCxCVEE) 2.7V to 12V Operating Temperature Range (2)(3) ?40°C to +125°C Package Thermal Resistance (2)(3) 24-Pin WQFN 38°C/W (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. (2) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) C TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board. (3) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ >
TA. See Applications section for information on temperature de-rating of this device.
2 Submit Documentation Feedback Copyright ? 2007C2013, Texas Instruments Incorporated Product Folder Links: LMH7322 LMH7322 www.ti.com SNOSAU8I CMARCH 2007CREVISED MARCH
2013 12V DC Electrical Characteristics Unless otherwise specified, all limits are specified for TJ = 25°C, VCCI = VCCO = 12V, VEE = 0V, RL = 50? to VCCO-2V, VCM =
300 mV, RHYS =
1 k?. Boldface limits apply at temperature extremes. Min Typ Max Symbol Parameter Conditions Units (1) (2) (1) INPUT CHARACTERISTICS IB Input Bias Current VIN Differential = 0V;
RHYS =
8 k? ?5 ?2.9 ?A Biased at VCM IOS Input Offset Current VIN Differential = 0V ?250
40 +250 nA TC IOS Input Offset Current TC VIN Differential = 0V 0.2 nA/°C VOS Input Offset Voltage ?8 ?2 +8 mV TC VOS Input Offset Voltage TC
12 ?V/°C VRI Input Voltage Range for CMRR ≥
50 dB VEE?0.2 VCCI?1.5 V VRID Input Differential Voltage Range ?1 +1 V CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ VCC1?0.2
80 dB PSRR Power Supply Rejection Ratio
80 dB AV Active Gain
53 dB Hyst Hysteresis VHYS = V(HYS + ) -V(HYS - ) , RHYS = 0?
25 50
75 mV LATCH ENABLE CHARACTERISTICS IB-LE Latch Enable Bias Current Biased at RSPECL Level
3 10 ?A VOS-LE Latch Enable Offset V........