编辑: kr9梯 | 2019-08-03 |
2007 IXYS CORPORATION All rights reserved Features ? Floating High Side Driver with boot-strap Power supply along with a Low Side Driver.
? Fully operational to 600V ? ± 50V/ns dV/dt immunity ? Gate drive power supply range:
10 - 35V ? Undervoltagelockoutforbothoutputdrivers ? Outputs are in phase with inputs ? Built using the advantages and compatibility of CMOS and IXYS HDMOSTM processes ? Latch-Up protected over entire operating range ? High peak output current: ±
600 mA ? Matched propagation delay for both outputs ? Lowoutputimpedance ? Low power supply current ? Immune to negative voltage transients First Release General Description The IXD611, with its two inputs referenced to ground, has high speed low side and high side gate ouptuts to drive either a pair of N-channel MOSFETs or IGBTs in a half-bridge totem pole configuration. The High Side driver can control a MOSFET or IGBT connected to a positive high voltage up to 600V. The logic input stages are compatible with TTL or CMOS, have built-in hysteresis and are fully immune to latch up over the entire operating range. The IXD611 can withstand dV/dt on the output side up to ± 50V/ns. The IXD611 comes in either the 8-PIN PDIP (IXD611P1), 8-PIN SOIC (IXD611S1), 14-PIN PDIP (IXD611P7), or the 14-PIN SOIC (IXD611S7) packages. Applications ? Driving MOSFETs and IGBTs in half-bridge circuits ? High voltage, high side and low side drivers ? Motor Controls ? Switch Mode Power Supplies (SMPS) ? DC to DC Converters ? Class D Switching Amplifiers Warning: The IXD611 is ESD sensitive. DS99198A(10/07) Up to 600V To Load VCC HIN LIN GND VCL HIN LIN DG VCH HGO HS LS LGO Figure 1A. Typical Circuit for IXD611P7/S7 Figure 1B. Typical Circuit for IXD611P1/S1 600V,
600 mA High & Low-side Driver for N-Channel MOSFETs and IGBTs Up to 600V To Load LGO HGO HS VCH VCL HIN LIN LS VCC GND LIN HIN IXD611 IXD611P1 8-PIN DIP IXD611P7 14-PIN DIP IXD611S1 8-PIN SOIC IXD611S7 14-PIN SOIC Ordering Information Part Number Package Type
2 IXD611 IXYS reserves the right to change limits, test conditions, and dimensions. Figure 2. IXD611 Functional Block Diagram Pin Description And Configuration SYMBOL FUNCTION DESCRIPTION VCL Supply Voltage Low side power supply. HIN HS Input High side Input signal, TTL or CMOS compatible;
HGO in phase LIN LS Input Low side Input signal, TTL or CMOS compatible;
LGO in phase DG Ground Logic reference ground (Not available for IXD611P1, IXD611S1) VCH Supply Voltage High side floating power supply, referenced to HS HGO Output High side driver output HS Return High side floating ground LGO Output Low side driver output LS Ground Low side ground
3 IXD611 ?
2007 IXYS CORPORATION All rights reserved
7 6
5 Figure 3A. Pin configuration for IXD611P1 (8 pin DIP) and IXD611S1 (8 pin SOIC) Figure 3B. Pin configuration for IXD611P7 (14 pin DIP) and IXD611S7 (14 pin SOIC)
1 2
3 4
5 6
7 8
9 10
11 12
13 14 HIN LGO LS LIN VCL VCH HGO HS VCL HIN LIN LS LGO HS VCH HGO
8 pin DIP
8 pin SOIC
1 2
3 4
5 6
7 8
1 2
3 4
8 IXD611S1 IXD611P1 LIN HGO NC NC NC NC DG LS LGO HS VCH VCL NC HS NC NC NC VCL VCH DG LIN HGO LGO NC NC LS HIN HIN
8 14
13 12
11 10
9 1
2 3
4 5
6 7
14 pin DIP
14 pin SOIC IXD611P7 IXD611S7
4 IXD611 IXYS reserves the right to change limits, test conditions, and dimensions. Symbol Definition Min Max Units VHS High side floating supply offset voltage -200
650 V VCH Highsidefloatingabsolutevoltage -0.3
35 V VHGO High side floating output voltage VHS - 0.3 VCH + 0.3 V VCL Low side fixed supply voltage -0.3
35 V VLGO Lowsideoutputvoltage -0.3 VCL + 0.3 V VDG Logic supply offset voltage (P7, S7 only) VLS - 0.7 VLS + 0.7 V VIN Logic input voltage(HIN & LIN) LS - 0.3 VCL + 0.3 V dVHS /dt Allowableoffsetsupplyvoltagetransient
50 V/ns PD Package power dissipation@ TA ≤ 25C
8 pin PDIP 1.0 W
8 pin SOIC 0.625 W
14 pin PDIP 1.6 W
14 pin SOIC 1.0 W RTHJA Thermal resistance, junction-to-ambient
8 pin PDIP
125 o C/W
8 pin SOIC
200 o C/W
14 pin PDIP
75 o C/W
14 pin SOIC
120 o C/W TJ JunctionTemperature
150 o C TS Storagetemperature -55
150 o C TL Lead temperature (soldering,
10 s)
300 o C Absolute Maximum Ratings Recommended Operating Conditions Symbol Definition Min Max Units VHS High side floating supply offset voltage -200
600 V VCH High side floating supply absolute voltage
10 30 V VHGO High side floating output voltage VHS VCH V VCL Low side fixed supply voltage
10 30 V VLGO Lowsideoutputvoltage
0 VCL V VDG Logic supply offset voltage (P7, S7 only) VLS - 0.3 VLS + 0.3 V VIN Logic input voltage(HIN, LIN) VDG or LS VCL V TA AmbientTemperature -40
125 o C
5 IXD611 ?
2007 IXYS CORPORATION All rights reserved Precaution : When performing the high voltage tests, adequate safety precautions should be taken. Symbol Definition Test Conditions Min Typ Max Units VINH Logic "1" input voltage VCL = VCH = 15V 2.7 V VINL Logic "0" input voltage VCL = VCH = 15V 2.4 V VHLGO / / VHHGO High level output voltage, IO = 20mA 0.22 0.3 V VCH -VHGO or VCL -VLGO VLLGO / / VLHGO Low level output voltage, IO = 20mA 0.16 0.25 V VHGO or VLGO IHL HS to LS bias current. VHS = 600V 0.12 0.2 mA IQHS Quiescent VCH supply current VCH = 15V VIN = 0V or VIN =
5 V 0.7 0.8 mA IQLS Quiescent VCL supply current VCL = 15V VIN = 0V or VIN =
5 V 0.18 0.3 mA IIN + Logic "1" input bias current VIN = VSUPPLY = 15V
11 20 uA IIN - Logic "0" input bias current VIN = 0V
1 2 uA VCHUV + VCH supply undervoltage positive going threshold. 7.5
8 8.5 V VCHUV - VCH supply undervoltage negative going threshold.
7 7.3
8 V VCLUV + VCL supply undervoltage positive going threshold 7.5
8 8.5 V VCLUV - VCL supply undervoltage negative going threshold.
7 7.5
8 V VCHUVH , VCLUVH Undervoltage Hysteresis 0.3 0.6 V IGO + HS or LS Output high short circuit current;
VGO = 15V, VIN = 5V, PW