PDF《TS555》

This is information on a product in full production.

June

2015 DocID4077 Rev

4 1/19 TS555 Low-power single CMOS timer Datasheet - production data Features ? Very low power consumption: C

110 ?A typ at VCC =

5 V C

90 ?a typ at VCC =

3 V ? High maximum astable frequency of 2.7 MHz ? Pin-to-pin functionally-compatible with bipolar NE555(a) ? Wide voltage range: +2 V to +16 V ? Supply current spikes reduced during output transitions ? High input impedance:

1012 Ω ? Output compatible with TTL, CMOS and logic MOS Description The TS555 is a single CMOS timer with very low consumption: (Icc(TYP) TS555 =

110 ?A at VCC = +5 V versus Icc(TYP) NE555(a) =

3 mA), and high frequency: (ff(max.) TS555 = 2.7 MHz versus f(max) NE555(a) = 0.1 MHz). Timing remains accurate in both monostable and astable mode. The TS555 provides reduced supply current spikes during output transitions, which enable the use of lower decoupling capacitors compared to those required by bipolar NE555(a) . With the high input impedance (1012 Ω), timing capacitors can also be minimized. a. Terminated product *1' 7ULJJHU 2XWSXW 5HVHW && &RQWURO 9ROWDJH

9 'LVFKDUJH 7KUHVKROG SO8 (plastic micropackage) Pin connections (top view) www.st.com Contents TS555 2/19 DocID4077 Rev

4 Contents

1 Absolute maximum ratings and operating conditions

3 2 Schematic diagrams

4 3 Electrical characteristics

6 4 Application information

13 4.1 Monostable operation

13 4.2 Astable operation

14 5 Package information

15 5.1 SO8 package information

16 6 Ordering information

17 7 Revision history

18 DocID4077 Rev

4 3/19 TS555 Absolute maximum ratings and operating conditions

19 1 Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings Symbol Parameter Value Unit VCC Supply voltage +18 V IOUT Output current ±

100 mA Rthja Thermal resistance junction to ambient (1) 1. Short-circuits can cause excessive heating. These values are typical and specified for a four layers PCB.

125 °C/W Rthjc Thermal resistance junction to case (1)

40 Tj Junction temperature +150 °C Tstg Storage temperature range -65 to +150 ESD Human body model (HBM)(2) 2. Human body model: a

100 pF capacitor is charged to the specified voltage, then discharged through a 1.5kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.

1500 V Machine model (MM)(3) 3. Machine model: a

200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor <

5 Ω). This is done for all couples of connected pin combinations while the other pins remain floating.

200 Charged device model (CDM)(4) 4. Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to the ground.

1000 Table 2. Operating conditions Symbol Parameter Value Unit VCC Supply voltage

2 to

16 V IOUT Output sink current Output source current

10 50 mA Toper Operating free air temperature range -40 to +125 °C Schematic diagrams TS555 4/19 DocID4077 Rev

4 2 Schematic diagrams Figure 1. Schematic diagram

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4 5/19 TS555 Schematic diagrams

19 Figure 2. Block diagram Note: Low: level voltage ≤ minimum voltage specified High: level voltage ≥ maximum voltage specified x: irrelevant Table 3. Functional table Reset Trigger Threshold Output Low x x Low High Low High High High Low Low Previous state /UTPUT $ISCHARGE 'ROUND 4RIGGER #ONTROL 6OLTAGE 4HRESHOLD