编辑: 棉鞋 | 2019-07-02 |
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3 HMCAD1050-80 v01.0411 Dual 13/12-Bit 65/80 MSPS A/D Converter AC Electrical Specifications -
65 MSPS AVDD=1.8V, DVDD= 1.8V, DVDDCK= 1.8V, OVDD=2.5V, FS=65 MSPS clock, 50% clock duty cycle, -1 dBFS
8 MHz input signal,
13 bit output, unless otherwise noted. Parameter Condition Min Typ Max Unit Performance SNR Signal to Noise Ratio FIN =
8 MHz 71.6 72.6 dBFS FIN =
20 MHz 71.8 dBFS FIN =~ FS/2 71.5 dBFS FIN =
40 MHz 70.4 dBFS SNDR Signal to Noise and Distortion Ratio FIN =
8 MHz 70.5 71.7 dBFS FIN =
20 MHz 71.7 dBFS FIN =~ FS/2 71.1 dBFS FIN =
40 MHz
70 dBFS SFDR Spurious Free Dynamic Range FIN =
8 MHz
75 81 dBc FIN =
20 MHz
84 dBc FIN =~ FS/2
79 dBc FIN =
40 MHz
77 dBc HD2 Second order Harmonic Distortion FIN =
8 MHz -85 -95 dBc FIN =
20 MHz -95 dBc FIN =~ FS/2 -95 dBc FIN =
40 MHz -95 dBc HD3 Third order Harmonic Distortion FIN =
8 MHz -75 -81 dBc FIN =
20 MHz -84 dBc FIN =~ FS/2 -79 dBc FIN =
40 MHz -79 dBc ENOB Effective number of Bits FIN =
8 MHz 11.4 11.6 bits FIN =
20 MHz 11.6 bits FIN =~ FS/2 11.5 bits FIN =
40 MHz 11.3 bits Crosstalk Signal crosstalk between channels, FIN1 = 8MHz, FIN0 = 9.9MHz -95 dB Power Supply Analog supply current 32.8 mA Digital supply current Digital core supply
5 mA Output driver supply 2.5V output driver supply, sine wave input, FIN =
1 MHz, CK_EXT enabled 8.2 mA Output driver supply 2.5V output driver supply, sine wave input, FIN =
1 MHz, CK_EXT disabled 6.6 mA Analog power Dissipation
59 mW Digital power Dissipation OVDD = 2.5V, ~5pF load on output bits, FIN =
1 MHz, CK_EXT disabled 25.5 mW Total power Dissipation OVDD = 2.5V, ~5pF load on output bits, FIN =
1 MHz, CK_EXT disabled 84.5 mW Power Down Dissipation 9.3 ?W Sleep Mode
1 Power Dissipation, Sleep mode one channel 55.3 mW Sleep Mode
2 Power Dissipation, Sleep mode both channels 20.4 mW Clock Inputs Max. Conversion Rate
65 MSPS Min. Conversion Rate
3 MSPS For price, delivery and to place orders: Hittite Microwave Corporation,
2 Elizabeth Drive, Chelmsford, MA
01824 978-250-3343 tel ? 978-250-3373 fax ? Order On-line at www.hittite.com Application Support: [email protected] A / D Converters - SMT
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4 HMCAD1050-80 v01.0411 Dual 13/12-Bit 65/80 MSPS A/D Converter AC Electrical Specifications -
80 MSPS AVDD=1.8V, DVDD=1.8V, DVDDCK=1.8V, OVDD=2.5V, FS=80MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal,
13 bit output, unless otherwise noted. Parameter Condition Min Typ Max Unit Performance SNR Signal to Noise Ratio FIN =
8 MHz 70.4
72 dBFS FIN =
20 MHz 71.7 dBFS FIN =
30 MHz 71.2 dBFS FIN =~ FS/2 70.7 dBFS SNDR Signal to Noise and Distortion Ratio FIN =
8 MHz 69.5 70.5 dBFS FIN =
20 MHz 70.5 dBFS FIN =
30 MHz 70.4 dBFS FIN =~ FS/2 70.3 dBFS SFDR Spurious Free Dynamic Range FIN =
8 MHz
74 77 dBc FIN =
20 MHz
78 dBc FIN =
30 MHz
78 dBc FIN =~ FS/2
78 dBc HD2 Second order Harmonic Distortion FIN =
8 MHz -80 -95 dBc FIN =
20 MHz -90 dBc FIN =
30 MHz -90 dBc FIN =~ FS/2 -85 dBc HD3 Third order Harmonic Distortion FIN =
8 MHz -74 -77 dBc FIN =
20 MHz -78 dBc FIN =
30 MHz -78 dBc FIN =~ FS/2 -78 dBc ENOB Effective number of Bits FIN =
8 MHz 11.3 11.4 bits FIN =
20 MHz 11.4 bits FIN =
30 MHz 11.4 bits FIN =~ FS/2 11.4 bits Crosstalk Signal crosstalk between channels, FIN1 = 8MHz, FIN0 = 9.9MHz -95 dB Power Supply Analog supply current 39.7 mA Digital supply current Digital core supply
6 mA Output driver supply 2.5V output driver supply, sine wave input, FIN =