PDF《F28M35x Concerto™ Microcontrollers》

s industry-leading proprietary 32-bit C28x floating-point CPU and features the most flexible and high-precision control peripherals, including ePWMs with fault protection, and encoders and captures―all as implemented by TI'

s TMS320C2000? Piccolo? and Delfino? families. In addition, the C28-CPU has been enhanced with the addition of the VCU instruction accelerator that implements efficient Viterbi, Complex Arithmetic, 16-bit FFTs, and CRC algorithms. A high-speed analog subsystem and supplementary RAM memory is shared, along with on-chip voltage regulation and redundant clocking circuitry. Safety considerations also include Error Correction Code (ECC), parity, and code secure memory, as well as documentation to assist with system-level industrial safety certification. (1) For more information on these devices, see Mechanical, Packaging, and Orderable Information. Device Information(1) PART NUMBER PACKAGE BODY SIZE F28M35H52CRFP HTQFP (144) 20.0 mm * 20.0 mm F28M35H22CRFP HTQFP (144) 20.0 mm * 20.0 mm F28M35M52CRFP HTQFP (144) 20.0 mm * 20.0 mm F28M35M20BRFP HTQFP (144) 20.0 mm * 20.0 mm F28M35E20BRFP HTQFP (144) 20.0 mm * 20.0 mm

3 F28M35H52C, F28M35H22C, F28M35M52C, F28M35M22C, F28M35M20B, F28M35E20B www.ti.com SPRS742J CJUNE 2011CREVISED DECEMBER

2017 Submit Documentation Feedback Product Folder Links: F28M35H52C F28M35H22C F28M35M52C F28M35M22C F28M35M20B F28M35E20B Device Overview Copyright ? 2011C2017, Texas Instruments Incorporated 1.4 Functional Block Diagram A. Some peripherals are not available on the F28M35Mx and F28M35Ex devices. Figure 1-1. Functional Block Diagram

4 F28M35H52C, F28M35H22C, F28M35M52C, F28M35M22C, F28M35M20B, F28M35E20B SPRS742J CJUNE 2011CREVISED DECEMBER

2017 www.ti.com Submit Documentation Feedback Product Folder Links: F28M35H52C F28M35H22C F28M35M52C F28M35M22C F28M35M20B F28M35E20B Table of Contents Copyright ? 2011C2017, Texas Instruments Incorporated Table of Contents

1 Device Overview

1 1.1 Features

1 1.2 Applications.2 1.3 Description.2 1.4 Functional Block Diagram

3 2 Revision History

5 3 Device Comparison

6 3.1 Related Products

9 4 Terminal Configuration and Functions

10 4.1 Pin Diagram

10 4.2 Signal Descriptions.12

5 Specifications

32 5.1 Absolute Maximum Ratings

32 5.2 ESD Ratings C Automotive.32 5.3 ESD Ratings C Commercial.32 5.4 Recommended Operating Conditions.33 5.5 Power Consumption Summary.34 5.6 Electrical Characteristics.39 5.7 Thermal Resistance Characteristics for RFP PowerPAD Package

40 5.8 Thermal Design Considerations

40 5.9 Timing and Switching Characteristics.41 5.10 Analog and Shared Peripherals

60 5.11 Master Subsystem Peripherals.96 5.12 Control Subsystem Peripherals

117 6 Detailed Description

150 6.1 Memory Maps.151 6.2 Identification.161 6.3 Master Subsystem

162 6.4 Control Subsystem.168 6.5 Analog Subsystem

172 6.6 Master Subsystem NMIs.175 6.7 Control Subsystem NMIs

175 6.8 Resets.177 6.9 Internal Voltage Regulation and Power-On-Reset Functionality.182 6.10 Input Clocks and PLLs.185 6.11 Master Subsystem Clocking

195 6.12 Control Subsystem Clocking.200 6.13 Analog Subsystem Clocking.203 6.14 Shared Resources Clocking

203 6.15 Loss of Input Clock (NMI Watchdog Function) ....

203 6.16 GPIOs and Other Pins

205 6.17 Emulation/JTAG

221 6.18 Code Security Module

224 6.19 ?CRC Module.225

7 Applications, Implementation, and Layout ......

227 7.1 TI Design or Reference Design.227

8 Device and Documentation Support.228 8.1 Device and Development Support Tool Nomenclature

228 8.2 Tools and Software