PDF《LM5117/Q1 具有模拟电流监视器的宽输入范围同步降压控制器》

12 4 修 修订 订历 历史 史记 记录 录NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision E (March 2013) to Revision F Page ? 已添加 器件信息和引脚配置和功能部分,ESD 额定值表,特性描述,器件功能模式,应用和实施,电源相关建议,布局,器件和文档支持以及机械、封装和可订购信息部分

1 ? Changed ?H into ?F

29 Changes from Revision D (March 2013) to Revision E Page ? Changed layout of National Data Sheet to TI format

34 2 Copyright ? 2011C2015, Texas Instruments Incorporated LM5117, LM5117-Q1 www.ti.com.cn ZHCS579F CAPRIL 2011CREVISED AUGUST

2015 5 Pin Configuration and Functions PWP Package 20-Pin HTSSOP Top View RTW Package 24-Pin WQFN Top View Copyright ? 2011C2015, Texas Instruments Incorporated

3 LM5117, LM5117-Q1 ZHCS579F CAPRIL 2011CREVISED AUGUST

2015 www.ti.com.cn Pin Functions PIN TYPE (1) DESCRIPTION HTSSOP WQFN NAME

1 24 UVLO Undervoltage lockout programming pin. If the UVLO pin voltage is below 0.4 V, the regulator is in the shutdown mode with all functions disabled. If the UVLO pin voltage is greater than 0.4 V and less than 1.25 V, the regulator is in standby mode with the VCC regulator operational, the SS pin grounded, and no switching at the HO and LO outputs. I If the UVLO pin voltage is above 1.25 V, the SS pin is allowed to ramp and pulse width modulated gate drive signals are delivered to the HO and LO pins. A 20μA current source is enabled when UVLO exceeds 1.25 V and flows through the external UVLO resistors to provide hysteresis.

2 1 DEMB Optional logic input that enables diode emulation when in the low state. In diode emulation mode, the low-side NMOS is latched off for the remainder of the PWM cycle after detecting reverse current flow (current flow from output to ground through the low- I side NMOS). When DEMB is high, diode emulation is disabled allowing current to flow in either direction through the low-side NMOS. A 50-k? pull-down resistor internal to the LM5117 holds DEMB pin low and enables diode emulation if the pin is left floating.

3 2 RES The restart timer pin that configures the hiccup mode current limiting. A capacitor on the RES pin determines the time the controller remains off before automatically restarting. O The hiccup mode commences when the controller experiences

256 consecutive PWM cycles of cycle-by-cycle current limiting. After this occurs, a 10-μA current source charges the RES pin capacitor to the 1.25 V threshold and restar........