PDF《INTEGRATED CIRCUITS》

48 kHz (locked to video frame rate if enabled) for slave mode operation in all modes except Digital Versatile Disc (DVD) compliant bypass. 1.4 Audio compression ? Dolby?(1) Digital Consumer Encoding (DDCE) also known as AC-3(2)

2 channel audio encoding at

256 kbit/s or

384 kbit/s (only for SAA6752HS/V103) ? MPEG-1 layer

2 audio encoding at

256 kbit/s or

384 kbit/s ? Input data bypass for Linear Pulse Code Modulation (LPCM) and compressed audio data [MPEG-1, MPEG-2, Dolby? Digital (DD) and Digital Theatre System (DTS)] according to IEC

61937 ? Preamble Pc, Preamble Pd and bit stream information captured for identification of modes during bypass of compressed audio data for MPEG-1, MPEG-2, DD and DTS according to IEC

61937 ? Audio mute via I2C-bus control for all modes except DVD-compliant bypass. (1) Dolby is a registered trademark of Dolby Laboratories Licensing Corporation. (2) AC-3 is a registered trademark of Dolby Laboratories Licensing Corporation.

2004 Jan

26 4 Philips Semiconductors Product speci?cation MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer SAA6752HS 1.5 Stream multiplexer ? Multiplexing of video and audio streams according to the MPEG-2 systems standard ( ISO 13818-1 ) ? Generation and output of MPEG-2 Transport Streams (TS), MPEG-2 Program Streams (PS), Packetized Elementary Streams (PES) and Elementary Streams (ES) compliant to the DVD, D-VHS and DVB standards ? MPEG time stamp (PTS/DTS/SCR/PCR) generation and insertion (synchronization) ? Insertion of metadata ? Optional generation of empty time slots for subsequent insertion of application specific data packets ? Optional insertion of user data in the GOP header and in the picture header ? Optional automatic insertion of Closed Caption data according to DVD or ATSC standard ? Optional generation of transport streams with variable bit rate. 1.6 Output interface ? Parallel interface 8-bit master/slave output ? 3-state output port ? Glueless interfacing with IEEE

1394 chip sets (for example, PDI

1394 L11) ? Data Expansion Bus Interface (DEBI) interface. 1.7 Control domain ? All control done via I2C-bus ? I2C-bus slave transceiver up to

400 kbit/s ? I2C-bus slave address select pin ? Host interrupt flag pin. 1.8 Other features ? Single external clock or single crystal

27 MHz ? Separate

27 MHz system clock output ? Interface voltage 3.3 V ? TTL compatible digital outputs ? Power supply voltage 3.3 and 2.5 V ? Boundary Scan Test (BST) supported ? Power-down mode ? Single SDRAM system memory (16 Mbit@16 bit or

64 Mbit@16 bit).

2 GENERAL DESCRIPTION 2.1 General Philips Semiconductors'

second generation real time MPEG-2 encoder, the SAA6752HS, is a highly integrated single-chip audio and video encoding solution with flexible multiplexing functionality. With our expertise in two critical areas for consumer video encoding, noise filtering and motion estimation, we have pushed the boundaries for video quality even further, providing enhanced quality for low bit rates and enabling increased recording times for a given storage capacity. The SAA6752HS will also enable a key driver for new consumer digital recording applications and system cost reduction. By integrating all audio encoding and multiplexing functionality we will be moving from a three chip to a one chip system, with cost efficient design and process technology, thus providing a truly low cost, high quality encoding system. The SAA6752HS/V104 is intended for customers whose application does not require the DDCE function. The SAA6752HS gives significant advantages to customers developing digital recording applications: ? Fast time-to-market and low development resources. By adding a simple external video input processor IC, an audio analog-to-digital converter, and an external SDRAM, analog video and audio sources are compressed into high quality MPEG-2 video and MPEG-1 layer