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1 ? HIP2500 Half Bridge 500VDC Driver Description The HIP2500 is a high voltage integrated circuit (HVIC) optimized to drive N-Channel MOS gated power devices in half bridge topol- ogies. It provides the necessary control for PWM motor drive, power supply, and UPS applications. The SD pin allows external shutdown of gate drive to both upper and lower gate outputs. Und- ervoltage lockout will not allow gating when the bias voltage is too low to drive the external switches into saturation. The HIP2500IP is pin and function compatible to the Interna- tional Rectifier IR2110. The HIP2500 has superior ability to accept negative voltages from the VS pin to the COM pin due to forward recovery of the lower flyback diode. The HIP2500IB is a SOIC or small outline IC form of the HIP2500. The HIP2500IB drives high side and low side refer- enced power switches just like the HIP2500IP. The HIP2500IP1 is a
16 lead Plastic DIP form of the HIP2500. Pins
4 and
5 removed from lead frame to provide extra creep- age and strike distances in high voltage applications. Please see Application Note AN9010 for more information. Functional Block Diagram DRIVER UV LATCH S R LEVEL SHIFT LOGIC UV HIN SD LIN HO LO COM HIP2500 VDD VSS VCC VS VB DRIVER Features ? Maximum Rating 500V ? Ability to Interface and Drive N-Channel Power Devices ? Floating Bootstrap Power Supply for Upper Rail Drive ? CMOS Schmitt-Triggered Inputs with Hysteresis and Pull-Down ? Up to 400kHz Operation ? Single Low Current Bias Supply ? Latch-Up Immune CMOS Logic ? Peak Drive Up to 2.0A ? Gate Drive Rise Time (+125o C)25ns (Typ) Applications ? High Frequency Switch-Mode Power Supply ? Induction Heating and Welding ? Switch Mode Amplifiers ? AC and DC Motor Drives ? Electronic Lamp Ballasts ? Battery Chargers ? UPS Inverters ? Noise Cancellation in Amplifier Systems Ordering Information PART NUMBER TEMP. RANGE (o C) PACKAGE PKG NO. HIP2500IP -40 to +85
14 Ld PDIP E14.3 HIP2500IP1 -40 to +85
16 Ld PDIP E16.3 HIP2500IB -40 to +85
16 Ld SOIC (W) M16.3 July
1998 File Number 2801.9 Pinouts HIP2500 (PDIP) TOP VIEW HIP2500 (SOIC) TOP VIEW HIP2500 (PDIP) TOP VIEW LIN SD HIN
14 13
12 11
10 9
8 NC NC
1 2
3 5
6 7
4 LO COM HO NC VDD VCC VSS VS VB
14 15
16 9
13 12
11 10
1 2
3 7
6 8 LO COM VCC VS HO VB NC LIN SD HIN VDD NC NC VSS
4 5 NC NC
14 15
16 9
13 12
11 10
1 2
3 7
6 8 LO COM VCC VS HO VB NC LIN SD HIN VDD NC NC VSS PART WITHDRAWN, PROCESS OBSOLETE NO NEW DESIGNS, SEE IR2110, IR2112, IR2113 or contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tsc
2 HIP2500 Absolute Maximum Ratings Full Temperature Range Unless Otherwise Noted, All Voltages Referenced to VSS Unless Otherwise Noted. Thermal Information Floating Supply Voltage, VB VS-0.5V to VS+18.0V (Positive Terminal) Floating Supply Voltage, VS 500V (Common Terminal) High Side Channel Output Voltage, VHO 0.5V to VB+0.5V Fixed Supply Voltage, VCC.0.5V to 18.0V Low Side Channel Output Voltage, VLO 0.5V to VCC+0.5V Logic Supply Voltage, VDD 0.5V to 18.0V Logic Input Voltage, VIN 0.5V to VDD+0.5V [HIN, LIN &
SD (Shutdown)] VDD to COM and VCC to VSS Voltage.0.5V to 18.0V Thermal Resistance (Note 1, Typical) θJA HIP2500IP 75o C/W HIP2500IP1 80o C/W HIP2500IB 90o C/W See Maximum Power Dissipation vs Temperature Curve Junction Temperature Range 40o C to +125o C Storage Temperature Range, TS 40o C to +150o C Operating Ambient Temperature Range, TA.40o C to +85o C NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Recommended DC Operating Conditions Floating Supply Voltage, VB VS+10V to VS+15V (Floating Terminal) High Side Channel Output Voltage, VHO 10V to VB (With Respect to VS) Fixed Supply Voltage, VCC.10V to 15V Low Side Channel Output Voltage, VLO 0V to VCC Logic Supply Voltage, VDD 4V to VCC Floating Supply Voltage, VS 4.0V to 500V (Common Terminal) VSS and COM potentials to be equal. Electrical Specifications VCC = (VB - VS) = VDD = 15V, COM = VSS = 0, Unless Otherwise Noted TJ = +25o C TJ = -40o C TO +125o C PARAMETER SYMBOL MIN TYP MAX MIN TYP MAX UNITS DC CHARACTERISTICS Quiescent VCC Current IQCC - 1.5 1.9 - - 2.0 mA Quiescent VBS Current IQBS -
300 400 -
300 435 ?A Quiescent VDD Current IQDD - 0.1
1 - - 1.8 ?A Quiescent Leakage Current IS (500V) - 0.4 3.0 - - - ?A Logic Input Pulldown Current, VIN = VDD (HIN, LIN, SD) IN+ -
12 20 - -
22 ?A Logic Input Leakage Current, VIN = VSS (HIN, LIN, SD) IN- -
0 1 -
0 1 ?A Logic Input Positive Going Threshold (Note 2) VTH+ 7.5 8.0 8.5 7.5 8.0 8.6 V Logic Input Negative Going Threshold (Note 2) VTH- 5.5 5.9 6.3 5.5 5.9 6.4 V Undervoltage Positive Going Threshold UV+ 8.0 9.35 9.99 7.8 - 9.99 V Undervoltage Negative Going Threshold UV- 7.7 9.05 9.69 7.5 - 9.69 V Undervoltage Hysteresis (VCC) UVHYS (VCC)
250 -
450 170 -
530 mV Undervoltage Hysteresis (VBS) UVHYS (VBS)
250 -
450 170 -
530 mV Output High Open Circuit Voltage (HO, LO) VOUT+ 14.95
15 - 14.95
15 - V Output Low Open Circuit Voltage (HO, LO) VOUT- - - 0.05 - - 0.05 V Output High Short Circuit Current (Sourcing) IOUT+ 1.65 2.1 - 1.15 1.6 - A Output Low Short Circuit Current (Sinking) IOUT- 1.85 2.3 - 1.35 1.7 - A NOTE: 2. See Figure
8 for logic supply voltages other than 15.0V.
3 HIP2500 Switching Specifications PARAMETER SYMBOL TJ = +25o C TJ = -40o C TO +125o C UNITS MIN TYP MAX MIN TYP MAX HIGH SIDE CHANNEL WITH 500V OFFSET, CL = 1000pF High Side Turn-On Propagation Delay tON
320 420
525 230 -
725 ns High Side Turn-Off Propagation Delay tOFF
260 385
450 190 -
625 ns High Side Rise Time tR -
25 50 -
25 50 ns High Side Turn-Off Fall Time tF -
25 50 -
25 50 ns LOW SIDE CHANNEL, CL = 1000pF Low Side Turn-On Propagation Delay tON
250 365
450 190 -
600 ns Low Side Turn-Off Propagation Delay tOFF
175 295
370 125 -
475 ns Low Side Turn-On Rise Time tR -
25 50 -
30 50 ns Low Side Turn-Off Fall Time tF -
25 50 -
30 50 ns Shutdown Propagation Delay High Side Shutdown Low Side Shutdown tSDHO
300 400
490 200 -
650 ns tSDLO
175 320
400 125 -
500 ns HIGH SIDE CHANNEL WITH 500V OFFSET, CL = 1000pF Turn-On Propagation Delay Matching (Between HO and LO) Mt
0 -
125 0 -
185 ns Minimum On Output Pulse Width (HO, LO) PWOUT(MIN) -
35 50 -
35 55 ns Minimum Off Output Pulse Width (HO, LO) PWOUTMIN
275 440
640 250
440 650 ns Minimum On Input Pulse Width (HIN, LIN) PWON(MIN) -
100 145 -
100 175 ns Minimum Off Input Pulse Width (HIN, LIN) PWOFF(MIN) -
110 200 -
110 220 ns Deadtime LO Turn-Off to HO Turn-On DHtON -
125 - -
125 - ns Deadtime HO Turn-Off to LO Turn-On DLtON - -20 - - -20 - ns MAXIMUM TRANSIENT CONDITIONS Offset Supply Operating Transient dVS/dt - -
50 - -
50 V/ns Logic Truth Table HIN LIN UVH UVL SD HO LO COMMENTS
0 0
0 0
0 0
0 Normal Off
0 1
0 0
0 0
1 Lower On
1 0
0 0
0 1
0 Upper On
1 1
0 0
0 1
1 Both On X X X X
1 0
0 Chip Disabled X X
1 1 X
0 0 VCC UV Lockout and VBS Lockout X
1 1
0 0
0 1 VBS UV Lockout
1 X
0 1
0 1
0 VCC UV Lockout
4 HIP2500 Typical Performance Curves FIGURE 1. MAXIMUM POWER DISSIPATION vs TEMPERATURE FIGURE 2. HIGH VOLTAGE POWER DISSIPATION vs SWITCHING FREQUENCY FIGURE 3. LOW VOLTAGE POWER DISSIPATION vs FREQUENCY FIGURE 4. VSS OFFSET vs VCC SUPPLY VOLTAGE
0 0.25 0.5 0.75
1 1.25 1.5 1.75
2 2.25 2.5 -40 -30 -20 -10
0 10
20 30
40 50
60 70
80 90
100110120130 AMBIENT TEMPERATURE (o C) HIP2500-IB HIP2500-IP1 MAXIMUM POWER DISSIPATION (W) HIP2500-IP
10 100
1000 SWITCHING FREQUENCY (kHz) 1.0 0.1 0.01 0.001 HIGH VOLTAGE POWER DISSIPATION (W) VBIAS = 15V CL = 100pF TA = +25oC VS = 400V VS = 300V VS = 200V VS = 100V
10 1.0 0.1 0.01 POWER DISSIPATION (W)
10 100
1000 SWITCHING FREQUENCY (kHz) 2100pF 907pF 100pF VS = VSS = COM VBS = VCC = 15VDC TA = +25o C NOTE: All switching losses assumed to be in IC.
6 4
2 0 -2 -4 LOGIC SUPPLY OFFSET VOLTAGE (V)
10 12
14 16 SUPPLY VOLTAGE (V) MAX VSS OFFSET MIN VSS OFFSET
5 HIP2500 FIGURE 5. OFFSET SUPPLY LEAKAGE vs TEMPERATURE FIGURE 6. MAXIMUM NEGATIVE VS OFFSET VOLTAGEvsVBS VOLTAGE FIGURE 7. UNDERVOLTAGE LOCKOUT vs TEMPERATURE FIGURE 8. INPUT LOGIC THRESHOLD vs SUPPLY VOLTS FIGURE 9. QUIESCENT VBS SUPPLY CURRENT vs TEMPERATURE FIGURE 10. RISE AND FALL TIME vs LOAD CAPACITANCE Typical Performance Curves (Continued)
10 1.0 0.1 OFFSET SUPPLY LEAKAGE CURRENT ( ? A)
0 20
40 60
80 100
120 140 TEMPERATURE (oC) 100V 200V 500V 400V 300V
10 9
8 7
6 5
4 3
2 MAX V S OFFSET VOLTAGE (NEGATIVE)
10 11
12 13
14 15
16 17
18 BOOTSTRAP SUPPLY VOLTAGE VCC = 15V AND 12V TJ = +25o C VCC = 15V VCC = 12V 9.35 9.2 9.0 8.9 UNDERVOLTAGE LOCKOUT (V) -40
0 40
100 140 TEMPERATURE (oC)
120 80
60 20 -20 8.95 9.05 9.1 9.15 9.25 9.3 VCC UV+ VBS UV+ VCC UV- VBS UV-
10 8
6 4
2 LOGIC THRESHOLD (V)
6 8
10 12
14 16
18 LOGIC SUPPLY VOLTAGE (V) TJ = -40oC TO +125oC VTH+ VTH-
5 (VDD TO VSS)
450 400
350 300
250 200
150 V BS SUPPLY CURRENT ( ? A) -50
0 50
100 150 JUNCTION TEMPERATURE (oC) 18V IQBS1 18V IQBS0 14V IQBS1 14V IQBS0 10V IQBS1 10V IQBS0
120 100
80 60
40 20
0 RISE AND FALL TIMES (ns)
100 1000 1E4 LOAD CAPACITANCE (pF) tF tR
6 HIP2500 FIGURE 11. DRIVER SINK/SOURCE V-I CHARACTERISTIC FIGURE 12. RISE AND FALL TIME vs TEMPERATURE FIGURE 13. RISE AND FALL TIME vs SUPPLY VOLTAGE FIGURE 14. PROPAGATION DELAY vs SUPPLY VOLTAGE FIGURE 15. PROPAGATION DELAYS AT VCC = 15V Typical Performance Curves (Continued)
0 2
4 6
8 10
12 14
16 SOURCE/SINK DRAIN-SOURCE VOLTAGE 3.0 2.5 2.0 1.5 1.0 0.5
0 PEAK OUTPUT CURRENT (A)
25 -40
125 0
25 -40
125 0 SINK DRIVER SOURCE DRIVER
30 28
26 24
22 20
18 16
14 12
10 RISE AND FALL TIME (ns) -50
0 50
100 150 TEMPERATURE (o C) tF tR
30 28
26 24
22 20
18 16
14 12
10 RISE AND FALL TIME (ns)
10 11
12 13
14 15
16 SUPPLY VOLTAGE (V) tF tR
460 440
420 400
380 360
340 320
300 PROPAGATION DELAY (ns)
10 11
12 13
14 15
16 SUPPLY VOLTAGE (V) HtON HtOFF LtON LtOFF
700 600
500 400
300 200 PROPAGATION DELAY (ns) -50
0 50
100 150 JUNCTION TEMPERATURE (o C) LtOFF HtOFF HtON LtON
7 HIP2500 NOTES: 1........