PDF《大师高级课程系列之》

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6090 2018 年11 月05 日C06 日|上海

一、为什么参加: 随着技术从微电子技术扩展到纳米电子学,静电放电(ESD)和电过载(EOS)继续影响半导体制造、 半导体元件、元器件封装和系统.

本课程从组件和系统的角度讲授故障分析、测试和设计,介绍静 电放电(ESD)和电过载(EOS)的基本原理.本教程提供了 ESD 和EOS 现象、测试、电路设计和设 计策略的清晰图像.本教程将介绍半导体芯片封装测试和设计方面的进展. 本次课程内容涵盖了: ? 静电放电(ESD)和电过应力(EOS)的基础知识,从物理学、时间尺度、安全工作区域(SOA) 到现象的物理模型;

? 半导体器件、电路和系统中的 ESD 和EOS 故障,讨论组件和封装的故障分析技术和工具;

? 讨论静电放电(ESD)模型和测试(例如人体模型(HBM) 、带电设备模型(CDM) 、电缆放电事 件(CDM) ,带电电路板事件(CBE) )到系统级 IEC 61000-4 -2 测试事件)以及随着系统的发展它 们如何变化;

? ESD design of ESD circuitry for receivers, I/O, ESD power clamps for digital, analog, mixed signal, and radio frequency (RF) circuitry;

? 用于接收器、I / O、数字、模拟、混合信号和射频(RF)电路的 ESD 设计;

? ESD 设计版图和用于 ESD 电路设计的自动化设计工具;

? 展示混合信号 EOS 中的 ESD 设计和 EMC 故障分析扫描方法以及当前的重建技术和未来的 2-D, 2.5-D 和3-D ESD 和EOS 设计问题和策略. Electrostatic Discharge (ESD) and Electrical Overstress (EOS) continue to impact semiconductor manufacturing, semiconductor components, component packages, and systems as technologies scale from microelectronics to nanoelectronics. This course teaches the fundamentals of electrostatic discharge (ESD) and electrical overstress(EOS), from a failure analysis, testing, and design in components and systems perspective. The 大师高级课程系列之 静电放电(ESD)和电过载(EOS): 器件、电路和系统 - 从先进技术到未来技术 Electrostatic Discharge (ESD) and Electrical Overstress (EOS): Devices, Circuits and Systems C From Advanced to Future Technologies 咨询

电话: 021-5109

6090 course provides a clear picture of ESD and EOS phenomena, testing, circuit design, and design strategies. The course will address advancements in testing and design on semiconductor chips, and packages. The course provides extensive coverage on: ? Fundamentals of electrostatic discharge (ESD) and electrical overstress (EOS), from physics, time scales, safe operating area (SOA), to physical models for phenomena;

? ESD and EOS failures in both semiconductor devices, circuits and systems;

failure analysis techniques and tools for components and packages will be discussed;

? Discussion of electrostatic discharge (ESD) events and testing (e.g. such as human body model (HBM), charged device model (CDM), cable discharge events (CDM), charged board events (CBE), to system level IEC 61000-4-2 test events) and how these are changing as systems evolve;

? ESD design of ESD circuitry for receivers, I/O, ESD power clamps for digital, analog, mixed signal, and radio frequency (RF) circuitry;

? ESD design layout and automated design tools for design of ESD circuitry;

? ESD design in mixed signal EOS and EMC scanning failure analysis scanning methods to current reconstruction techniques will be shown;

and ? Future 2-D, 2.5-D and 3-D ESD and EOS design issues and strategies.

二、谁应该参加: 本课程是为几类设计师开发的: * ESD / EMC,模拟 IP 模块和电路设计团队的经理及其设计人员. * ESD 专家/工程师,工程师与工程/质量,系统工程师相关 *具有 ESD 经验的设计师,更新他们的 ESD 知识,并根据当前的设计程序调整他们的经验. This course has been developed for several categories of designers: * Managers of design teams of ESD/EMC, analog IP blocks and circuits, and their designers. * ESD Specialist/Engineer、 Engineers correlated with Engineering/Quality、System Engineer * Designers with ESD experience, to update their ESD knowledge and to tune their experience to the present-day design procedures.