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LM9076Q www.

ti.com SNVS713B CAPRIL 2011CREVISED MARCH

2013 LM9076Q 150mA Ultra-Low Quiescent Current LDO Regulator with Delayed Reset Output Check for Samples: LM9076Q 1FEATURES DESCRIPTION The LM9076Q is a ±3%,

150 mA logic controlled 2? AEC-Q100 Grade1 Qualified (-40°C to +125°C) voltage regulator. The regulator features an active ? Available with 5.0V or 3.3V Output Voltage low delayed reset output flag which can be used to ? Ultra Low Ground Pin Current,

25 μA Typical reset a microprocessor system at turn-ON and in the for

100 μA Load event that the regulator output voltage falls below a minimum value. An external capacitor programs a ? VOUT Initial Accuracy of ±1.5% delay time interval before the reset output pin can ? VOUT Accurate to ±3% Over Load and return high. Temperature Conditions Designed for automotive and industrial applications, ? Low Dropout Voltage,

200 mV Typical with the LM9076Q contains a variety of protection features

150 mA Load such as thermal shutdown, input transient protection ? Low Off State Ground Pin Current for and a wide operating temperature range. The LM9076QBMA LM9076Q uses an PNP pass transistor which allows low drop-out voltage operation. ? Delayed RESET Output Pin for Low VOUT Detection ? +70V/-50V Voltage Transients ? Operational VIN up to +40V

1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright ? 2011C2013, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. LM9076Q SNVS713B CAPRIL 2011CREVISED MARCH

2013 www.ti.com Typical Applications Figure 1. LM9076QS-x.x In

5 lead SFM package Figure 2. LM9076QBMA-x.x in

8 lead SOIC package Connection Diagram Figure 3. Top View Figure 4. Top View See SFM Package Number KTT0005B See SOIC Package Number D0008A These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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2013 Absolute Maximum Ratings (1)(2) VIN(DC) -15V to +55V VIN(+Transient) t<

10ms, Duty Cycle VOR to RESET pin HIGH SHUTDOWN CONTROL LOGIC ― LM9076QBMA-5.0 Only VSHUTDOWN pin falling SHUTDOWN Pin Low VIL(SD) from 5.0V until VOUT

1 1.5 C V Threshold Voltage >

4.5V (VOUT = On) VSHUTDOWN pin rising SHUTDOWN Pin High VIH(SD) from 0V until VOUT <

C 1.5

2 V Threshold Voltage 0.5V (VOUT = Off) VSHUTDOWN = 40V C

35 C μA SHUTDOWN Pin High IIH(SD) VSHUTDOWN = 5V C

15 35 μA Bias Current VSHUTDOWN = 2V C

6 10 μA SHUTDOWN Pin Low IIL(SD) VSHUTDOWN = 0V C

0 C μA Bias Current

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2013 Typical Performance Characteristics Output Capacitor ESR Output Capacitor ESR Figure 5. Figure 6. Output Voltage vs Low Input Voltage Output Voltage vs Low Input Voltage Figure 7. Figure 8. Ground Pin Current vs Low Input Voltage Ground Pin Current vs Low Input Voltage Figure 9. Figure 10. Copyright ? 2011C2013, Texas Instruments Incorporated Submit Documentation Feedback