PDF《TMPM4G Group(1)》

TMPM4G Group(1) Datasheet 2019-03-26

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132 Rev.

4.2 ? 2018-2019 Toshiba Electronic Devices &

Storage Corporation CMOS Digital Integrated Circuit Silicon Monolithic TMPM4G Group(1) General Description Arm ? Cortex?-M4( with FPU) Frequency:

1 to

160 MHz, Operation voltage: 2.7 to 3.6 V Code Flash:

512 KB to

1536 KB. Data Flash: 32KB Built-in High speed 12-bit AD converter and plenty of timers/serial channels Applications TMPM4G group(1) integrates widely used for the equipment in which high speed data procedure is required, such as OA/digital products, industrial equipment, and others. Features Arm Cortex-M4( with FPU) ? Operation frequency:

1 to

160 MHz ? Memory Protection Unit (MPU) Supply voltage and power consumption ? Operation voltage: 2.7 to 3.6 V ? Low-power consumption operation: IDLE, STOP1, and STOP2 Operation temperature: -

40 to +85℃@operation frequency

1 to

120 MHz -

40 to +70℃@operation frequency

1 to

160 MHz Internal memory ? Code Flash:

512 KB to

1536 KB, rewritable up to 10,000 times ? Data Flash:

32 KB, rewritable up to 100,000 times ? Data Flash is rewritable during instruction execution ? RAM:

128 KB to

192 KB and Backup RAM:

2 KB (all products) Clock ? External high speed oscillator:

8 MHz to

20 MHz (Ceramic and Crystal) ? External high speed clock input:

8 to

20 MHz ? Internal high speed oscillator1 (IHOSC1):10MHz, user trimming function ? Internal high speed oscillator2 (IHOSC2):10MHz ? PLL:

160 MHz output ? External low speed oscillator: 32.768 kHz Oscillation Frequency Detectior (OFD): Abnormal system clock detection Voltage Detection (LVD):

7 levels. selection between interrupts and reset outputs Interrupt ? External:

12 to

16 factors. Integrate digital noise filters (DNF). ? Internal:

91 to

124 factors I/O ports:

87 to

155 (Input: 4, Output: 1) ? Enable to select Pull-up/Pull-down resistor, Open-drain ? 5V tolerant, 3V tolerant On-chip debug (JTAG/SW) and NBDIF (RAM monitor) Trigger Selector (TRGSEL) ? Expand trigger requests for DMA Controller, Timer counter, and others. DMA Controller:

3 units ? MDMAC:

1 unit, DMA requests:

30 to

32 factors, internal/external triggers ? HDMAC:

2 units, DMA requests:

13 to

15 factors, internal/external triggers External bus interface(EBIF) ? Expandable to 64MB(Program/data) ? External data bus(separate bug/multiplexed bun): 8/16 bit width ? Chip select controller:

4 channels Asynchronous serial communication ? UART:

3 to

6 channels, 5.0 Mbps (Max). FIFO (Transmission

8 stage and Reception

8 stage) ? FUART:

1 or

2 channels, 2.5Mbps (Max). FIFO (Transmission

32 stage and Reception

32 stage) and IrDA 115.2Kbps (Max). Serial Peripheral Interface (TSPI):

5 to

9 channels ? SIO/SPI mode,

25 Mbps (Max) ? FIFO (Transmission 16bit x

8 stage and Reception 16bit x

8 stage) I2C Interface (I2C):

3 to

5 channels Multi master, standard mode/fast mode available Serial Memory Interface (SMIF):

1 channel ? Connectable to two SPI FLASH VFBGA177(13x13mm, 0.8mm pitch) VFBGA145(12x12mm, 0.8mm pitch) Start of commercial production 2019-2 LQFP128(14x14mm, 0.4mm pitch) LQFP100(14x14mm, 0.5mm pitch) LQFP176(20x20mm, 0.4mm pitch) LQFP144(20x20mm, 0.5mm pitch) TMPM4G Group(1) Datasheet 2019-03-26

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132 Rev.4.2 Consumer Electronics Control Circuit (CEC):

1 channel 8-bit DA converter (DAC):

2 channels 12-bit AD converter (ADC):

16 to

24 channel inputs ? Sample and hold circuit ? Conversion time: 1.0 ?s @fADCLK =