编辑: 戴静菡 2019-07-15
Cypress Semiconductor Corporation ?

198 Champion Court ? San Jose, CA 95134-1709 ? 408-943-2600 Document Number: 002-01747 Rev.

*A Revised December 17,

2015 S29WS512P S29WS256P S29WS128P 512/256/128 Mb (32/16/8 M x

16 bit), 1.8 V, Simultaneous Read/Write Flash Features ? Single 1.8 V read/program/erase (1.70C1.95 V) ?

90 nm MirrorBit? Technology ? Simultaneous Read/Write operation with zero latency ? Random page read access mode of

8 words with

20 ns intra page access time ?

32 Word /

64 Byte Write Buffer ? Sixteen-bank architecture consisting of 32/16/8 Mwords for 512/256/128P, respectively ? Four

16 Kword sectors at both top and bottom of memory array ? 510/254/126 64Kword sectors (WS512/256/128P) ? Programmable linear (8/16/32) with or without wrap around and continuous burst read modes ? Secured Silicon Sector region consisting of

128 words each for factory and

128 words for customer ? 20-year data retention (typical) ? Cycling Endurance: 100,000 cycles per sector (typical) ? Command set compatible with JEDEC (42.4) standard ? Hardware (WP#) protection of top and bottom sectors ? Dual boot sector configuration (top and bottom) ? Handshaking by monitoring RDY ? Offered Packages C WS512P/WS256P/WS128P: 84-ball FBGA (11.6 mm x

8 mm) ? Low VCC write inhibit ? Persistent and Password methods of Advanced Sector Protection ? Write operation status bits indicate program and erase operation completion ? Suspend and Resume commands for Program and Erase operations ? Unlock Bypass program command to reduce programming time ? Synchronous or Asynchronous program operation, independent of burst control register settings ? ACC input pin to reduce factory programming time ? Support for Common Flash Interface (CFI) General Description The Spansion S29WS512/256/128P are Mirrorbit? Flash products fabricated on

90 nm process technology. These burst mode Flash devices are capable of performing simultaneous read and write operations with zero latency on two separate banks using separate data and address pins. These products can operate up to

104 MHz and use a single VCC of 1.7 V to 1.95 V that makes them ideal for today'

s demanding wireless applications requiring higher density, better performance and lowered power consumption. Performance Characteristics Read Access Times Speed Option (MHz)

104 Max. Synch Access Time (tIACC) 103.8 Max. Synch. Burst Access, ns (tBACC) 7.6 Max OE# Access Time, ns (tOE) 7.6 Max. Asynch. Access Time, ns (tACC)

80 Current Consumption (typical values) Continuous Burst Read @

104 MHz

36 mA Simultaneous Operation

104 MHz

40 mA Program

20 mA Standby Mode

20 ?A Typical Program &

Erase Times Single Word Programming

40 ?s Effective Write Buffer Programming (VCC) Per Word 9.4 ?s Effective Write Buffer Programming (VACC) Per Word

6 ?s Sector Erase (16 Kword Sector)

350 ms Sector Erase (64 Kword Sector)

600 ms Document Number: 002-01747 Rev. *A Page

2 of

86 S29WS512P S29WS256P S29WS128P Contents 1. Ordering Information.3 1.1 Valid Combinations.3 2. Input/Output Descriptions &

Logic Symbol

4 3. Block Diagrams.5 4. Physical Dimensions/Connection Diagrams.5 4.1 Related Documents

5 4.2 Special Handling Instructions for FBGA Package.5 4.3 MCP Look-ahead Connection Diagram

7 5. Additional Resources.8 6. Product Overview

9 6.1 Memory Map.9 7. Device Operations

11 7.1 Device Operation Table

12 7.2 Asynchronous Read.12 7.3 Page Mode Read.13 7.4 Synchronous (Burst) Read Operation.13 7.5 Synchronous (Burst) Read Mode &

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