PDF《 全自我知识产权 8 位指令集》

80 INDF 使用 SFR 的内容对数据存储器进行访问(非物理寄存器) xxxx xxxx

81 OPTION /PAPU INTEDG T0CS T0SE PSA PS2 PS1 PS0

1111 1111

82 PCL 程序计数器低

8 位0000

0000 83 STATUS - - PAGE /TF /PF Z HC C --01 1xxx

84 FSR 间接寻址指针寄存器 xxxx xxxx

85 TRISA - - TRISA[5:4] - TRISA[2:0] --11 -111

86

87

88

89 8A PCLATH 程序计数器高

3 位锁存器 ---- -000 8B INTCON GIE PEIE T0IE INTE PAIE T0IF INTF PAIF

0000 0000 8C PIE1 EEIE CKMEAIE - - - - TMR2IE - 000- 000- 8D 8E PCON POR /BOR ---- --qq 8F OSCCON LFMOD IRCF[2:0] - HFIOFR LFIOFR -

0101 -00-

90

91

92 PR2 PR2[7-0] timer2 period register

1111 1111

93

94

95 WPUA - - WPUA[5:4] - WPUA[2:0] --11 -111

96 IOCA - - IOCA[5:0] --00

0000 97

98

99 9A EEDAT EEDAT[7:0]

0000 0000 9B EEADR EEADR[7:0]

0000 0000 9C EECON1 - - WREN3 WREN2 WRERR WREN1 - RD --00 x0-0 9D EECON2 WR ---- ---0 9E Fremont Micro Devices Preliminary FT60F01x Rev1.18 第10 页2018-12-21 9F A0~BF C0~FF Access BANK0 SRAM,40~7F xxxx xxxx 注意: 1. INDF 不是物理寄存器;

2. 灰色部分表示没有实现;

3. 未实现的寄存器位不要写 1,因为后续产品可能会使用到. 2.1.3. TMR0,地址 0x01 Bit

7 6

5 4

3 2

1 0 Name TMR0[7:0] Reset xxxx xxxx Bit Name Function 7:0 TMR0[7:0] Timer

0 计数结果寄存器 2.1.4. STATUS 寄存器,地址 0x03,0x83 Bit

7 6

5 4

3 2

1 0 Name - - PAGE /TF /PF Z HC C Reset - -

0 1

1 x x x Bit Name Function 7:6 NA 没实现,读05PAGE PAGE: Register Bank Select bit (used for direct addressing)

1 = Bank

1 (80h C FFh)

4 /TF TF: Time-out bit

1 = After power-up,CLRWDT instruction or SLEEP instruction

0 = A WDT time-out occurred

3 /PF PF: Power-down bit

1 = After power-up or by the CLRWDT instruction

0 = By execution of the SLEEP instruction

2 Z Z: Zero bit

1 = The result of an arithmetic or logic operation is zero

0 = The result of an arithmetic or logic operation is not zero

1 HC HC: Digit Carry/Borrow bit (ADDWF,ADDLW,SUBLW,SUBWF instructions),For Borrow,the polarity is reversed

1 = A carry-out from the 4th low-order bit of the result occurred

0 = No carry-out from the 4th low-order bit of the result

0 C C: Carry/Borrow bit(1) (ADDWF , ADDLW , SUBLW , SUBWF instructions) Fremont Micro Devices Preliminary FT60F01x Rev1.18 第11 页2018-12-21

1 = A carry-out from the Most Significant bit of the result occurred

0 = No carry-out from the Most Significant bit of the result occurred /TO /PD 条件

1 1 上电或者低电压复位

0 U WDT 复位

0 0 WDT 唤醒 U U 正常运行下发生 MCLR 复位

1 0 睡眠状态下发生 MCLR 复位 2.1.5. PORTA 寄存器,地址 0x05 Bit

7 6

5 4

3 2

1 0 Name - - PA5 PA4 PA3 PA2 PA1 PA0 Reset - -

0 0 x

0 0

0 Bit Name Function

7 - -

6 - -

5 PA[5] PORTA5 数据

4 PA[4] PORTA4 数据

3 PA[3] PA3 只有输入功能,不存在相应的数据寄存器

2 PA[2] PORTA2 数据

1 PA[1] PORTA1 数据

0 PA[0] PORTA0 数据 2.1.6. INTCON 寄存器,地址 0x0B Bit

7 6

5 4

3 2

1 0 Name GIE PEIE T0IE INTE PAIE T0IF INTF PAIF Reset

0 0

0 0

0 0

0 0 Bit Name Function

7 GIE GIE: Global Interrupt Enable bit 全局中断使能

1 = Enables all unmasked interrupts

0 = Disables all interrupts

6 PEIE PEIE: Peripheral Interrupt Enable bit 外设中断使能

1 = Enables all unmasked peripheral interrupts

0 = Disables all peripheral interrupts

5 T0IE T0IE: Timer0 Overflow Interrupt Enable bit 定时器0溢出中断使 能1=Enables the Timer0 interrupt Fremont Micro Devices Preliminary FT60F01x Rev1.18 第12 页2018-12-21