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3 3 PSMN7R5-30MLD N-channel
30 V, 7.
5 mΩ logic level MOSFET in LFPAK33 using NextPowerS3 Technology
11 August
2015 Product data sheet Scan or click this QR code to view the latest information for this product 1. General description Logic level gate drive N-channel enhancement mode MOSFET in LFPAK33 package. NextPowerS3 portfolio utilising NXP'
s unique SchottkyPlus technology delivers high efficiency, low spiking performance usually associated with MOSFETs with an integrated Schottky or Schottky-like diode but without problematic high leakage current. NextPowerS3 is particularly suited to high efficiency applications at high switching frequencies. 2. Features and benefits ? Ultra low QG, QGD and QOSS for high system efficiency, especially at higher switching frequencies ? Superfast switching with soft-recovery;
s-factor >
1 ? Low spiking and ringing for low EMI designs ? Unique SchottkyPlus technology;
Schottky-like performance with <
1 ?A leakage at
25 °C ? Optimised for 4.5 V gate drive ? Low parasitic inductance and resistance ? High reliability clip bonded and solder die attach Mini Power SO8 package;
no glue, no wire bonds, qualified to
175 °C ? Exposed leads for optimal visual solder inspection 3. Applications ? On-board DC-to-DC solutions for server and telecommunications ? Secondary-side synchronous rectification in telecommunication applications ? Voltage regulator modules (VRM) ? Point-of-Load (POL) modules ? Power delivery for V-core, ASIC, DDR, GPU, VGA and system components ? Brushed and brushless motor control 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage
25 °C ≤ Tj ≤
175 °C - -
30 V ID drain current Tmb =
25 °C;
VGS =
10 V;
Fig.
2 - -
57 A Ptot total power dissipation Tmb =
25 °C;
Fig.
1 - -
45 W NXP Semiconductors PSMN7R5-30MLD N-channel
30 V, 7.5 mΩ logic level MOSFET in LFPAK33 using NextPowerS3 Technology PSMN7R5-30MLD All information provided in this document is subject to legal disclaimers. ? NXP Semiconductors N.V. 2015. All rights reserved Product data sheet
11 August
2015 2 /
13 Symbol Parameter Conditions Min Typ Max Unit Tj junction temperature -55 -
175 °C Static characteristics VGS = 4.5 V;
ID =
10 A;
Tj =
25 °C;
Fig.
10 - 8.2 10.3 mΩ RDSon drain-source on-state resistance VGS =
10 V;
ID =
15 A;
Tj =
25 °C;
Fig.
10 - 6.3 7.6 mΩ Dynamic characteristics QGD gate-drain charge VGS = 4.5 V;
ID =
15 A;
VDS =
15 V;
Fig. 12;
Fig.
13 - 1.7 2.5 nC QG(tot) total gate charge VGS = 4.5 V;
ID =
15 A;
VDS =
15 V;
Fig. 12;
Fig.
13 - 5.8 8.8 nC Source-drain diode S softness factor IS =
15 A;
VGS =
0 V;
dIS/dt = -100 A/?s;
VDS =
15 V;
Fig.
16 - 1.2 - 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol
1 S source
2 S source
3 S source
4 G gate mb D mounting base;
connected to drain
1 4
3 2 LFPAK33 (SOT1210) S D G mbb076 6. Ordering information Table 3. Ordering information Package Type number Name Description Version PSMN7R5-30MLD LFPAK33 Plastic single ended surface mounted package (LFPAK33);
8 leads SOT1210 7. Marking Table 4. Marking codes Type number Marking code PSMN7R5-30MLD 7D530L NXP Semiconductors PSMN7R5-30MLD N-channel
30 V, 7.5 mΩ logic level MOSFET in LFPAK33 using NextPowerS3 Technology PSMN7R5-30MLD All information provided in this document is subject to legal disclaimers. ? NXP Semiconductors N.V. 2015. All rights reserved Product data sheet