编辑: hyszqmzc | 2018-06-06 |
11 August
2015 3 /
13 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage
25 °C ≤ Tj ≤
175 °C -
30 V VDGR drain-gate voltage
25 °C ≤ Tj ≤
175 °C;
RGS =
20 kΩ -
30 V VGS gate-source voltage -20
20 V Ptot total power dissipation Tmb =
25 °C;
Fig.
1 -
45 W VGS =
10 V;
Tmb =
25 °C;
Fig.
2 -
57 A ID drain current VGS =
10 V;
Tmb =
100 °C;
Fig.
2 -
40 A IDM peak drain current pulsed;
tp ≤
10 ?s;
Tmb =
25 °C;
Fig.
3 -
230 A Tstg storage temperature -55
175 °C Tj junction temperature -55
175 °C Tsld(M) peak soldering temperature -
260 °C Source-drain diode IS source current Tmb =
25 °C -
38 A ISM peak source current pulsed;
tp ≤
10 ?s;
Tmb =
25 °C -
230 A Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy VGS =
10 V;
Tj(init) =
25 °C;
ID =
15 A;
Vsup ≤
30 V;
RGS =
50 Ω;
unclamped;
tp =
97 ?s [1] - 28.3 mJ [1] Protected by 100% test NXP Semiconductors PSMN7R5-30MLD N-channel
30 V, 7.5 mΩ logic level MOSFET in LFPAK33 using NextPowerS3 Technology PSMN7R5-30MLD All information provided in this document is subject to legal disclaimers. ? NXP Semiconductors N.V. 2015. All rights reserved Product data sheet
11 August
2015 4 /
13 Tmb (°C)
0 200
150 50
100 03aa16
40 80
120 Pder (%)
0 Fig. 1. Normalized total power dissipation as a function of mounting base temperature aaa-008398
0 25
50 75
100 125
150 175
200 0
10 20
30 40
50 60 Tmb (°C) ID ID (A) (A) Fig. 2. Continuous drain current as a function of mounting base temperature aaa-008399 10-1
1 10
102 10-1
1 10
102 103 VDS (V) ID ID (A) (A) DC DC
100 ms
100 ms
10 ms
10 ms
1 ms
1 ms
100 us
100 us tp =
10 us tp =
10 us Limit RDSon = VDS / ID Limit RDSon = VDS / ID Fig. 3. Safe operating area;
continuous and peak drain currents as a function of drain-source voltage 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Fig.
4 - 3.1 3.32 K/W NXP Semiconductors PSMN7R5-30MLD N-channel
30 V, 7.5 mΩ logic level MOSFET in LFPAK33 using NextPowerS3 Technology PSMN7R5-30MLD All information provided in this document is subject to legal disclaimers. ? NXP Semiconductors N.V. 2015. All rights reserved Product data sheet
11 August
2015 5 /
13 Symbol Parameter Conditions Min Typ Max Unit Fig.
5 -
57 - K/W Rth(j-a) thermal resistance from junction to ambient Fig.
6 -
178 - K/W 003aaj429 single shot 0.2 0.1 0.05 10-2 10-1
1 10 10-5 10-4 10-3 10-2 10-1
1 tp (s) Zth(j-mb) (K/W) δ = 0.5 0.02 10-6 tp T P t tp T δ = Fig. 4. Transient thermal impedance from junction to mounting base as a function of pulse duration aaa-008476 Fig. 5. PCB layout for thermal resistance junction to ambient
1 square pad;
FR4 Board;
2oz copper aaa-00........