PDF《8-bit》

Features ? High-performance, Low-power AVR? 8-bit Microcontroller ? Advanced RISC Architecture C

133 Powerful Instructions C Most Single Clock Cycle Execution C

32 x

8 General Purpose Working Registers + Peripheral Control Registers C Fully Static Operation C Up to

16 MIPS Throughput at

16 MHz C On-chip 2-cycle Multiplier ? Nonvolatile Program and Data Memories C 128K Bytes of In-System Reprogrammable Flash Endurance: 10,000 Write/Erase Cycles C Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation C 4K Bytes EEPROM Endurance: 100,000 Write/Erase Cycles C 4K Bytes Internal SRAM C Up to 64K Bytes Optional External Memory Space C Programming Lock for Software Security C SPI Interface for In-System Programming ? JTAG (IEEE std.

1149.1 Compliant) Interface C Boundary-scan Capabilities According to the JTAG Standard C Extensive On-chip Debug Support C Programming of Flash, EEPROM, Fuses and Lock Bits through the JTAG Interface ? Peripheral Features C Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes C Two Expanded 16-bit Timer/Counters with Separate Prescaler, Compare Mode and Capture Mode C Real Time Counter with Separate Oscillator C Two 8-bit PWM Channels C

6 PWM Channels with Programmable Resolution from

2 to

16 Bits C Output Compare Modulator C 8-channel, 10-bit ADC

8 Single-ended Channels

7 Differential Channels

2 Differential Channels with Programmable Gain at 1x, 10x, or 200x C Byte-oriented Two-wire Serial Interface C Dual Programmable Serial USARTs C Master/Slave SPI Serial Interface C Programmable Watchdog Timer with On-chip Oscillator C On-chip Analog Comparator ? Special Microcontroller Features C Power-on Reset and Programmable Brown-out Detection C Internal Calibrated RC Oscillator C External and Internal Interrupt Sources C Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended Standby C Software Selectable Clock Frequency C ATmega103 Compatibility Mode Selected by a Fuse C Global Pull-up Disable ? I/O and Packages C

53 Programmable I/O Lines C 64-lead TQFP and 64-pad QFN/MLF ? Operating Voltages C 2.7 - 5.5V for ATmega128L C 4.5 - 5.5V for ATmega128 ? Speed Grades C

0 -

8 MHz for ATmega128L C

0 -

16 MHz for ATmega128 8-bit Microcontroller with 128K Bytes In-System Programmable Flash ATmega128 ATmega128L Summary Rev. 2467OSCAVRC10/06

2 ATmega128 2467OSCAVRC10/06 Pin Configurations Figure 1. Pinout ATmega128 Note: The Pinout figure applies to both TQFP and MLF packages. The bottom pad under the QFN/MLF package should be soldered to ground. Overview The ATmega128 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega128 achieves throughputs approaching

1 MIPS per MHz allowing the sys- tem designer to optimize power consumption versus processing speed.

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34 33 PEN RXD0/(PDI) PE0 (TXD0/PDO) PE1 (XCK0/AIN0) PE2 (OC3A/AIN1) PE3 (OC3B/INT4) PE4 (OC3C/INT5) PE5 (T3/INT6) PE6 (ICP3/INT7) PE7 (SS) PB0 (SCK) PB1 (MOSI) PB2 (MISO) PB3 (OC0) PB4 (OC1A) PB5 (OC1B) PB6 PA3 (AD3) PA4 (AD4) PA5 (AD5) PA6 (AD6) PA7 (AD7) PG2(ALE) PC7 (A15) PC6 (A14) PC5 (A13) PC4 (A12) PC3 (A11) PC2 (A10) PC1 (A9) PC0 (A8) PG1(RD) PG0(WR)

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