编辑: 捷安特680 2019-07-01

4 ? Changed Handling to ESD Ratings

4 ? 已添加 器件支持

24 ? 已更改 将SIL 封装图更改成了 SIL0008G

25 Changes from Revision E (January 2014) to Revision F Page ? 已添加 引脚配置和功能部分,处理额定值表,特性 描述 部分,器件功能模式,应用和实施部分,电源相关建议部 分,布局部分,器件和文档支持部分以及机械、封装和可订购信息部分

1 Changes from Revision D (March 2013) to Revision E Page ? Added new package SIL0008A

3 3 LMZ10501 www.ti.com.cn ZHCS572G CMAY 2011CREVISED JULY

2018 Copyright ? 2011C2018, Texas Instruments Incorporated

5 Pin Configuration and Functions 8-Pin SIL Package Pin Functions PIN I/O DESCRIPTION NAME NO. EN

1 I Enable Input. Set this digital input higher than 1.2 V for normal operation. For shutdown, set low. Pin is internally pulled up to VIN and can be left floating for always-on operation. VCON

2 I Output voltage control pin. Connect to analog voltage from resisitve divider or DAC/controller to set the VOUT voltage. VOUT = 2.5 x VCON. Connect a small (470pF) capacitor from this pin to SGND to provide noise filtering. FB

3 I Feedback of the error amplifier. Connect directly to output capacitor to sense VOUT. SGND

4 I Ground for analog and control circuitry. Connect to PGND at a single point. VOUT

5 O Output Voltage. Connected to one terminal of the integrated inductor. Connect output filter capacitor between VOUT and PGND. PGND

6 I Power ground for the power MOSFETs and gate-drive circuitry. VIN

7 I Voltage supply input. Connect ceramic capacitor between VIN and PGND as close as possible to these two pins. Typical capacitor values are between 4.7 ?F and

22 ?F. VREF

8 O 2.35-V voltage reference output. Typically connected to VCON pin through a resistive divider to set the output voltage. PAD I The center pad underneath the SIL0008A package is internally tied to SGND. Connect this pad to the ground plane for improved thermal performance.

4 LMZ10501 ZHCS572G CMAY 2011CREVISED JULY

2018 www.ti.com.cn Copyright ? 2011C2018, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and specifications. (3) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For the Electrical Characteristics table for specifications and test conditions.

6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1)(2)(3) MIN MAX UNIT VIN, VREF to SGND ?0.2 +6.0 V PGND to SGND ?0.2 +0.2 V EN, FB, VCON (SGND ?0.2) (VIN +0.2) w/6 max V VOUT (PGND ?0.2) (VIN +0.2) w/6 max V Junction temperature (TJ-MAX) ?40

125 °C Maximum lead temperature

260 °C Storage temperature, Tstg C65

150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1000 V Charged-device model (CDM), per JEDEC specification JESD22- C101(2) ±250 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT Input voltage 2.7 5.5 V Recommended load current

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