PDF《具有 5.5V 最大输入电压的 LMZ10501 1A 微型模块》

0 1000 mA Junction temperature, TJ ?40

125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. (2) Junction-to-ambient thermal resistance (RθJA) is based on 4-layer board thermal measurements, performed under the conditions and guidelines set forth in the JEDEC standards JESD51-1 to JESD51-11. RθJA varies with PCB copper area, power dissipation, and airflow. 6.4 Thermal Information THERMAL METRIC(1) LMZ10501 UNIT SIL (?SIP)

8 PINS RθJA Junction-to-ambient thermal resistance (2) SIL0008G Package 45.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance

25 °C/W RθJB Junction-to-board thermal resistance 9.2 °C/W ψJT Junction-to-top characterization parameter 1.5 °C/W ψJB Junction-to-board characterization parameter 9.1 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance

25 °C/W

5 LMZ10501 www.ti.com.cn ZHCS572G CMAY 2011CREVISED JULY

2018 Copyright ? 2011C2018, Texas Instruments Incorporated (1) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate the Average Outgoing Quality Level (AOQL). (2) Typical numbers are at 25°C and represent the most likely parametric norm. (3) Shutdown current includes leakage current of the high side PFET. (4) Current limit is built-in, fixed, and not adjustable. 6.5 Electrical Characteristics over operating free-air temperature range (unless otherwise noted). Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 3.6 V, VEN = 1.2 V. (1) PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT SYSTEM PARAMETERS VREF * GAIN Reference voltage * VCON to FB bain VIN = VEN = 5.5V, VCON = 1.44V 5.7575 5.875 5.9925 V GAIN VCON to FB Gain VIN = 5.5V, VCON = 1.44V 2.4375 2.5 2.5750 V/V VINUVLO VIN rising threshold 2.24 2.41 2.64 V VINUVLO HYST VIN UVLO hysteresis

120 165

200 mV ISHDN Shutdown supply current VIN = 3.6V, VEN = 0.5V(3)

11 18 ?A Iq DC bias current into VIN VIN = 5.5V, VCON = 1.6V, IOUT = 0A 6.5 9.5 mA RDROPOUT VIN to VOUTresistance IOUT =

200 mA

305 575 mΩ I LIM DC output current limit VCON = 1.72V (4)

1025 1350 mA FOSC Internal oscillator frequency 1.75 2.0 2.25 MHz VIH,ENABLE Enable logic HIGH voltage 1.2 V VIL,ENABLE Enable logic LOW voltage 0.5 V TSD Thermal shutdown Rising Threshold

150 °C TSD-HYST Thermal shutdown hysteresis

20 °C DMAX Maximum duty cycle 100% TON-MIN Minimum on-time

50 ns θJA SIL0008A Package Thermal Resistance 20mm x 20mm board

2 layers,

2 oz copper, 0.5W, no airlow

77 °C/W 15mm x 15mm board

2 layers,

2 oz copper, 0.5W, no airlow

88 10mm x 10mm board

2 layers,

2 oz copper, 0.5W, no airlow

107 6.6 System Characteristics The following specifications are ensured by design providing the component values in Figure

12 are used (CIN = COUT =

10 ?F, 6.3 V, 0603, TDK C1608X5R0J106K). These parameters are not ensured by production testing. Unless otherwise stated the following conditions apply: TA = 25°C. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ΔVOUT/VOU T Output voltage regulation over line voltage and load current VOUT = 0.6 V ΔVIN = 2.7 V to 4.2 V ΔIOUT = 0A to 1A ±1.75% ΔVOUT/VOU T Output voltage regulation over line voltage and load........