编辑: 被控制998 | 2019-07-14 |
3 ―
1 September
2015 6 of
15 BLF7G20L-90P;
BLF7G20LS-90P Power LDMOS transistor 7.5 Single carrier IS-95 Single carrier IS-95 with pilot, paging, sync and
6 traffic channels (Walsh codes
8 - 13). PAR = 9.7 dB at 0.01 % probability on the CCDF. Channel bandwidth is 1.2288 MHz. VDS =
28 V;
IDq =
550 mA;
f =
1880 MHz. Fig 6. GSM EDGE RMS EDGE and peak EDGE as function of load power;
typical values PL (W)
0 20
40 60
70 50
30 10 001aal872 EVM (%)
0 5
10 15
20 25 EVMM EVMrms VDS =
28 V;
IDq =
600 mA;
f =
1880 MHz. VDS =
28 V;
IDq =
600 mA;
f =
1880 MHz. Fig 7. Single carrier IS-95 power gain and drain efficiency as function of load power;
typical values Fig 8. Single carrier IS-95 ACPR at
885 kHz and at
1980 kHz as function of load power;
typical values PL (W)
0 48
32 16 001aal873
17 19
21 Gp (dB) ηD (%)
15 20
40 60
0 ηD Gp 001aal874 PL (W)
0 48
32 16 ?60 ?50 ?70 ?40 ?30 ACPR (dBc) ?80 ACPR885k ACPR1980k BLF7G20L-90P_7G20LS-90P#3 All information provided in this document is subject to legal disclaimers. ? Ampleon The Netherlands B.V. 2015. All rights reserved. Product data sheet Rev.
3 ―
1 September
2015 7 of
15 BLF7G20L-90P;
BLF7G20LS-90P Power LDMOS transistor 7.6 Single carrier W-CDMA 3GPP;
test model 1;
64 DPCH;
PAR = 7.2 dB at 0.01 % probability on CCDF. Channel bandwidth is 3.84 MHz. VDS =
28 V;
IDq =
600 mA;
f =
1880 MHz. Fig 9. Single carrier IS-95 peak-to-average power ratio as a function of load power;
typical values PL (W)
0 48
32 16 001aal875
11 PAR
4 5
6 7
8 9
10 VDS =
28 V;
IDq =
600 mA;
f =
1880 MHz. VDS =
28 V;
IDq =
600 mA;
f =
1880 MHz. Fig 10. Single carrier W-CDMA power gain and drain efficiency as function of load power;
typical values Fig 11. Single carrier W-CDMA ACPR at
5 MHz and at
10 MHz as function of load power;
typical values PL (W)
0 20
40 60
70 50
30 10 001aal876
17 19
21 Gp (dB) ηD (%)
15 20
40 60
0 Gp ηD PL (W)
0 20
40 60
70 50
30 10 001aal877 ?52 ?36 ?20 ACPR (dBc) ?68 ACPR5M ACPR10M BLF7G20L-90P_7G20LS-90P#3 All information provided in this document is subject to legal disclaimers. ? Ampleon The Netherlands B.V. 2015. All rights reserved. Product data sheet Rev.
3 ―
1 September
2015 8 of
15 BLF7G20L-90P;
BLF7G20LS-90P Power LDMOS transistor 7.7 Test circuit [1] American Technical Ceramics type 100A or capacitor of same quality. [2] TDK or capacitor of same quality. [3] American Technical Ceramics type 100B or capacitor of same quality. Table 8. List of components For test circuit see Figure 12. Component Description Value Remarks C1, C2, C3 multilayer ceramic chip capacitor
24 pF [1] C4, C5 multilayer ceramic chip capacitor 4.7 ?F [2] C6, C7, C8 multilayer ceramic chip capacitor
11 pF [3] C9, C10 multilayer ceramic chip capacitor
10 ?F [2] C11 electrolytic capacitor
470 ?F;
63 V R1, R2 SMD resistor
12 ? Philips
1206 Printed-Circuit Board (PCB): Taconic RF35;
?r = 3.5 F/m;
thickness = 0.76 mm;
thickness copper plating =
35 ?m. See Table
8 for a list of components. Fig 12. Component layout for class-AB production test circuit 001aal878 C4 R1 C1 R2 C2 C6 C9 C11 C5 C3 C7 C8 C10 INPUT REV
3 BLF7G20L-90P OUTPUT REV
3 BLF7G20L-90P BLF7G20L-90P_7G20LS-90P#3 All information provided in this document is subject to legal disclaimers. ? Ampleon The Netherlands B.V. 2015. All rights reserved. Product data sheet Rev.